upm  1.6.0
Sensor/Actuator repository for libmraa (v1.9.0)
bma220.hpp
1 /*
2  * Author: Jon Trulson <jtrulson@ics.com>
3  * Copyright (c) 2015 Intel Corporation.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #include <string>
27 #include <vector>
28 #include <mraa/common.hpp>
29 #include <mraa/i2c.hpp>
30 #include <mraa/gpio.hpp>
31 
32 #define BMA220_I2C_BUS 0
33 #define BMA220_DEFAULT_ADDR 0x0a
34 
35 namespace upm {
36 
71  class BMA220 {
72  public:
73 
74  // NOTE: reserved registers must not be written into or read from.
75  // Reserved bitfields must always be 0. The registers aren't
76  // named in the datasheet, so I made up some hopefully useful
77  // names for them. The whole I2C register map design is a little
78  // strange, IMO.
79 
83  typedef enum {
84  REG_CHIPID = 0x00,
85  REG_REVISIONID = 0x02,
86 
87  // 2 lsb bits of ACC regs are always 0, yeilding 6 bits resolution
88  REG_ACC_X = 0x04, // acceleration data
89  REG_ACC_Y = 0x06,
90  REG_ACC_Z = 0x08,
91 
92  REG_H_HYST_DUR = 0x0a, // high hysteresis/dur
93  REG_THRESHOLD = 0x0c, // high/low threshold
94  REG_L_HYST_DUR = 0x0e, // low hysteresis/dur
95 
96  REG_TAP_CONFIG = 0x10,
97 
98  REG_SLOPE_CONFIG = 0x12,
99  REG_TAP_CONFIG2 = 0x14,
100 
101  REG_INT_STATUS1 = 0x16,
102  REG_INT_STATUS2 = 0x18,
103 
104  REG_ENABLE_CONFIG = 0x1a,
105  REG_ENABLE_CONFIG2 = 0x1c,
106  REG_ENABLE_CONFIG3 = 0x1e,
107 
108  REG_FILTER_CONFIG = 0x20,
109 
110  REG_SBIST_FSL_CONFIG = 0x22, // self test and full scale range
111 
112  // 0x24 - 0x2c reserved
113 
114  REG_I2C_WATCHDOG = 0x2e, // + SPI 3-wire mode
115 
116  REG_SUSPEND = 0x30,
117  REG_SOFTRESET = 0x32
118  } REG_T;
119 
120 
124  typedef enum {
125  H_HYST_DUR_HIGH_DUR0 = 0x01,
126  H_HYST_DUR_HIGH_DUR1 = 0x02,
127  H_HYST_DUR_HIGH_DUR2 = 0x04,
128  H_HYST_DUR_HIGH_DUR3 = 0x08,
129  H_HYST_DUR_HIGH_DUR4 = 0x10,
130  H_HYST_DUR_HIGH_DUR5 = 0x20,
131  _H_HYST_DUR_HIGH_DUR_MASK = 63,
132  _H_HYST_DUR_HIGH_DUR_SHIFT = 0,
133 
134  H_HYST_DUR_HIGH_HY1 = 0x40,
135  H_HYST_DUR_HIGH_HY2 = 0x80,
136  _H_HYST_DUR_HIGH_HY_MASK = 3,
137  _H_HYST_DUR_HIGH_HY_SHIFT = 6
139 
143  typedef enum {
144  THRESHOLD_HIGH0 = 0x01,
145  THRESHOLD_HIGH1 = 0x02,
146  THRESHOLD_HIGH2 = 0x04,
147  THRESHOLD_HIGH3 = 0x08,
148  _THRESHOLD_HIGH_MASK = 15,
149  _THRESHOLD_HIGH_SHIFT = 0,
150 
151  THRESHOLD_LOW0 = 0x10,
152  THRESHOLD_LOW1 = 0x20,
153  THRESHOLD_LOW2 = 0x40,
154  THRESHOLD_LOW3 = 0x80,
155  _THRESHOLD_LOW_MASK = 15,
156  _THRESHOLD_LOW_SHIFT = 4
158 
162  typedef enum {
163  L_HYST_DUR_LOW_DUR0 = 0x01,
164  L_HYST_DUR_LOW_DUR1 = 0x02,
165  L_HYST_DUR_LOW_DUR2 = 0x04,
166  L_HYST_DUR_LOW_DUR3 = 0x08,
167  L_HYST_DUR_LOW_DUR4 = 0x10,
168  L_HYST_DUR_LOW_DUR5 = 0x20,
169  _L_HYST_DUR_LOW_DUR_MASK = 63,
170  _L_HYST_DUR_LOW_DUR_SHIFT = 0,
171 
172  L_HYST_DUR_LOW_HY1 = 0x40,
173  L_HYST_DUR_LOW_HY2 = 0x80,
174  _L_HYST_DUR_LOW_HY_MASK = 3,
175  _L_HYST_DUR_LOW_HY_SHIFT = 6
177 
181  typedef enum {
182  TAP_CONFIG_DUR0 = 0x01,
183  TAP_CONFIG_DUR1 = 0x02,
184  TAP_CONFIG_DUR2 = 0x04,
185  _TAP_CONFIG_DUR_MASK = 7,
186  _TAP_CONFIG_DUR_SHIFT = 0,
187 
188  TAP_CONFIG_THRESH0 = 0x08,
189  TAP_CONFIG_THRESH1 = 0x10,
190  TAP_CONFIG_THRESH2 = 0x20,
191  TAP_CONFIG_THRESH3 = 0x40,
192  _TAP_CONFIG_THRESH_MASK = 15,
193  _TAP_CONFIG_THRESH_SHIFT = 3,
194 
195  TAP_CONFIG_FILTER = 0x80
197 
201  typedef enum {
202  SLOPE_CONFIG_DUR0 = 0x01,
203  SLOPE_CONFIG_DUR1 = 0x02,
204  _SLOPE_CONFIG_DUR_MASK = 3,
205  _SLOPE_CONFIG_DUR_SHIFT = 0,
206 
207  SLOPE_CONFIG_THRESH0 = 0x04,
208  SLOPE_CONFIG_THRESH1 = 0x08,
209  SLOPE_CONFIG_THRESH2 = 0x10,
210  SLOPE_CONFIG_THRESH3 = 0x20,
211  _SLOPE_CONFIG_THRESH_MASK = 15,
212  _SLOPE_CONFIG_THRESH_SHIFT = 2,
213 
214  SLOPE_CONFIG_FILTER = 0x40,
215  SLOPE_CONFIG_ORIENT_EX = 0x80 // exchange x and z axis for orient
217 
221  typedef enum {
222  TAP_CONFIG2_SAMP0 = 0x01,
223  TAP_CONFIG2_SAMP1 = 0x02,
224  _TAP_CONFIG2_SAMP_MASK = 3,
225  _TAP_CONFIG2_SAMP_SHIFT = 0,
226 
227  TAP_CONFIG2_ORIENT_BLOCK0 = 0x04,
228  TAP_CONFIG2_ORIENT_BLOCK1 = 0x08,
229  _TAP_CONFIG2_ORIENT_BLOCK_MASK = 3,
230  _TAP_CONFIG2_ORIENT_BLOCK_SHIFT = 2,
231 
232  TAP_CONFIG2_TIP_EN = 0x10
233 
234  // 0x20-0x80 reserved
236 
240  typedef enum {
241  TAP_SAMP_2 = 0, // 2 data samples after wakeup
242  TAP_SAMP_4 = 1,
243  TAP_SAMP_8 = 2,
244  TAP_SAMP_16 = 3
245  } TAP_SAMP_T;
246 
251  typedef enum {
252  TAP_ORIENT_BLOCK_0 = 0, // orient blocking disabled
253  TAP_ORIENT_BLOCK_2 = 1, // |z|>0.9g OR |x|+|y| < 0.2g OR m<0.2g
254  TAP_ORIENT_BLOCK_3 = 2, // |z|>0.9g OR |x|+|y| < 0.3g OR m<0.3g
255  TAP_ORIENT_BLOCK_4 = 3, // |z|>0.9g OR |x|+|y| < 0.4g OR m<0.4g
257 
261  typedef enum {
262  INT_STATUS1_SIGN = 0x01,
263  INT_STATUS1_FIRST_Z = 0x02,
264  INT_STATUS1_FIRST_Y = 0x04,
265  INT_STATUS1_FIRST_X = 0x08,
266 
267  INT_STATUS1_ORIENT0 = 0x10,
268  INT_STATUS1_ORIENT1 = 0x20,
269  INT_STATUS1_ORIENT2 = 0x40,
270  _INT_STATUS1_ORIENT_MASK = 7,
271  _INT_STATUS1_ORIENT_SHIFT = 4,
272 
273  INT_STATUS1_ORIENT_INT = 0x80 // orient intr was generated
275 
282  typedef enum {
283  CONFIG_ORI_UP_PORT_UPRIGHT = 0, // up portrait
284  CONFIG_ORI_UP_PORT_UPSIDE_DOWN = 1,
285  CONFIG_ORI_UP_LAND_LEFT = 2, // landscape
286  CONFIG_ORI_UP_LAND_RIGHT = 3,
287  CONFIG_ORI_DN_PORT_UPRIGHT = 4, // down portrait
288  CONFIG_ORI_DN_PORT_UPSIDE_DOWN = 5,
289  CONFIG_ORI_DN_LAND_LEFT = 6, // landscape
290  CONFIG_ORI_DN_LAND_RIGHT = 7
291  } CONFIG_ORIENT_T;
292 
296  typedef enum {
297  INT_STATUS2_SLOPE = 0x01,
298  INT_STATUS2_DATA = 0x02,
299  INT_STATUS2_HIGH = 0x04,
300  INT_STATUS2_LOW = 0x08,
301  INT_STATUS2_TAP = 0x10
302 
303  // 0x20-0x80 reserved
305 
309  typedef enum {
310  ENABLE_CONFIG_TT_Z = 0x01,
311  ENABLE_CONFIG_TT_Y = 0x02,
312  ENABLE_CONFIG_TT_X = 0x04,
313  ENABLE_CONFIG_SLOPE_Z = 0x08,
314  ENABLE_CONFIG_SLOPE_Y = 0x10,
315  ENABLE_CONFIG_SLOPE_X = 0x20,
316  ENABLE_CONFIG_ORIENT = 0x40,
317  ENABLE_CONFIG_DATA = 0x80
319 
323  typedef enum {
324  ENABLE_CONFIG2_HIGH_Z = 0x01,
325  ENABLE_CONFIG2_HIGH_Y = 0x02,
326  ENABLE_CONFIG2_HIGH_X = 0x04,
327 
328  ENABLE_CONFIG2_LOW = 0x08,
329 
330  ENABLE_CONFIG2_LAT_INT0 = 0x10, // interrupt latching
331  ENABLE_CONFIG2_LAT_INT1 = 0x20,
332  ENABLE_CONFIG2_LAT_INT2 = 0x40,
333  _ENABLE_CONFIG2_LAT_INT_MASK = 7,
334  _ENABLE_CONFIG2_LAT_INT_SHIFT = 4,
335 
336  ENABLE_CONFIG2_RESET_INT = 0x80 // reset interrupts
338 
344  typedef enum {
345  CONFIG2_LAT_UNLATCH = 0, // unlatched intrs
346  CONFIG2_LAT_0_25 = 1, // latch intr for 0.25s
347  CONFIG2_LAT_0_5 = 2, // latch intr for 0.5s
348  CONFIG2_LAT_1 = 3, // latch intr for 1s
349  CONFIG2_LAT_2 = 4, // latch intr for 2s
350  CONFIG2_LAT_4 = 5, // latch intr for 4s
351  CONFIG2_LAT_8 = 6, // latch intr for 8s
352  CONFIG2_LAT_PERM = 7 // latch permanently
353  } CONFIG2_LAT_T;
354 
358  typedef enum {
359  ENABLE_CONFIG3_Z_CHAN = 0x01,
360  ENABLE_CONFIG3_Y_CHAN = 0x02,
361  ENABLE_CONFIG3_X_CHAN = 0x04,
362 
363  ENABLE_CONFIG3_SLEEP_DUR0 = 0x08,
364  ENABLE_CONFIG3_SLEEP_DUR1 = 0x10,
365  ENABLE_CONFIG3_SLEEP_DUR2 = 0x20,
366  _ENABLE_CONFIG3_SLEEP_DUR_MASK = 7,
367  _ENABLE_CONFIG3_SLEEP_DUR_SHIFT = 3,
368 
369  ENABLE_CONFIG3_SLEEP_EN = 0x40
370 
371  // 0x80 reserved
373 
380  typedef enum {
381  SLEEP_DUR_2MS = 0, // 2 ms
382  SLEEP_DUR_10MS = 1,
383  SLEEP_DUR_25MS = 2,
384  SLEEP_DUR_50MS = 3,
385  SLEEP_DUR_100MS = 4,
386  SLEEP_DUR_500MS = 5,
387  SLEEP_DUR_1S = 6, // 1 second
388  SLEEP_DUR_2S = 7
389  } SLEEP_DUR_T;
390 
394  typedef enum {
395  FILTER_CONFIG_FILTER0 = 0x01,
396  FILTER_CONFIG_FILTER1 = 0x02,
397  FILTER_CONFIG_FILTER2 = 0x04,
398  FILTER_CONFIG_FILTER3 = 0x08,
399  _FILTER_CONFIG_FILTER_MASK = 15,
400  _FILTER_CONFIG_FILTER_SHIFT = 0,
401 
402  // 0x10-0x40 reserved
403 
404  FILTER_CONFIG_SERIAL_HIGH_BW = 0x80
406 
412  typedef enum {
413  FILTER_CONFIG_1KHZ = 0, // 1Khz
414  FILTER_CONFIG_500HZ = 1,
415  FILTER_CONFIG_250HZ = 2,
416  FILTER_CONFIG_125HZ = 3,
417  FILTER_CONFIG_64HZ = 4,
418  FILTER_CONFIG_32HZ = 5
419  } FILTER_CONFIG_T;
420 
424  typedef enum {
425  REG_SBIST_FSL_RANGE0 = 0x01, // full scale range
426  REG_SBIST_FSL_RANGE1 = 0x02,
427  _REG_SBIST_FSL_RANGE_MASK = 3,
428  _REG_SBIST_FSL_RANGE_SHIFT = 0,
429 
430  REG_SBIST_FSL_SBIST0 = 0x04, // self test enables
431  REG_SBIST_FSL_SBIST1 = 0x08,
432  _REG_SBIST_FSL_SBIST_MASK = 3,
433  _REG_SBIST_FSL_SBIST_SHIFT = 2,
434 
435  REG_SBIST_FSL_SBIST_SIGN = 0x10 // signedness of self test
436 
437  // 0x20-0x80 reserved
439 
445  typedef enum {
446  FSL_RANGE_2G = 0, // 2G FSL
447  FSL_RANGE_4G = 1,
448  FSL_RANGE_8G = 2,
449  FSL_RANGE_16G = 3
450  } FSL_RANGE_T;
451 
457  typedef enum {
458  SBIST_OFF = 0, // self test off
459  SBIST_X = 1, // self test X
460  SBIST_Y = 2,
461  SBIST_Z = 3
462  } SBIST_T;
463 
467  typedef enum {
468  I2C_WATCHDOG_SPI3 = 0x01, // SPI 3wire mode (SPI not supported)
469 
470  I2C_WATCHDOG_TO_SEL = 0x02,
471  I2C_WATCHDOG_TO_EN = 0x04
472 
473  // 0x08-0x80 reserved
475 
476 
483  BMA220(int bus=BMA220_I2C_BUS, uint8_t addr=BMA220_DEFAULT_ADDR);
484 
488  ~BMA220();
489 
493  void update();
494 
501  uint8_t readReg(uint8_t reg);
502 
510  bool writeReg(uint8_t reg, uint8_t val);
511 
517  uint8_t getChipID();
518 
524  uint8_t getChipRevision();
525 
533 
541  void getAccelerometer(float *x, float *y, float *z);
542 
548  std::vector<float> getAccelerometer();
549 
556  bool setFilterConfig(FILTER_CONFIG_T filter);
557 
566  bool setSerialHighBW(bool high);
567 
576  bool enableAxes(bool xEn, bool yEn, bool zEn);
577 
584  uint8_t suspend();
585 
592  uint8_t softReset();
593 
602  bool sleep(bool enable);
603 
611  bool setSleepDuration(SLEEP_DUR_T dur);
612 
619  bool setLowGThreshold(uint8_t thresh);
620 
627  bool setHighGThreshold(uint8_t thresh);
628 
635  bool setLowGHysteresis(uint8_t hyst);
636 
643  bool setLowGDuration(uint8_t dur);
644 
651  bool setHighGHysteresis(uint8_t hyst);
652 
659  bool setHighGDuration(uint8_t dur);
660 
667  bool setTapDuration(uint8_t dur);
668 
675  bool setTapThreshold(uint8_t thresh);
676 
683  bool enableTapFilter(bool filt);
684 
691  bool setSlopeDuration(uint8_t dur);
692 
699  bool setSlopeThreshold(uint8_t thresh);
700 
707  bool enableSlopeFilter(bool filt);
708 
714  uint8_t getInterruptStatus1();
715 
722 
728  uint8_t getInterruptStatus2();
729 
736  bool setInterruptEnables1(uint8_t bits);
737 
743  uint8_t getInterruptEnables1();
744 
751  bool setInterruptEnables2(uint8_t bits);
752 
758  uint8_t getInterruptEnables2();
759 
767 
776  bool resetInterrupts();
777 
778 
789  void installISR(int gpio, mraa::Edge level,
790  void (*isr)(void *), void *arg);
791 
796  void uninstallISR();
797 
798  mraa::Gpio* get_gpioIntr();
799 
800  protected:
801  mraa::I2c m_i2c;
802  mraa::Gpio *m_gpioIntr;
803  uint8_t m_addr;
804 
805  // uncompensated accelerometer values
806  float m_accelX;
807  float m_accelY;
808  float m_accelZ;
809 
810  // accelerometer full scale
811  float m_accelScale;
812 
813  private:
814  /* Disable implicit copy and assignment operators */
815  BMA220(const BMA220&) = delete;
816  BMA220 &operator=(const BMA220&) = delete;
817 
821  void updateAccelerometer();
822 
823  };
824 }
uint8_t readReg(uint8_t reg)
Definition: bma220.cxx:97
uint8_t softReset()
Definition: bma220.cxx:237
SBIST_FSL_CONFIG_BITS_T
Definition: bma220.hpp:424
bool enableTapFilter(bool filt)
Definition: bma220.cxx:369
FILTER_CONFIG_BITS_T
Definition: bma220.hpp:394
uint8_t getInterruptEnables1()
Definition: bma220.cxx:445
bool setTapDuration(uint8_t dur)
Definition: bma220.cxx:343
uint8_t getInterruptStatus2()
Definition: bma220.cxx:435
bool resetInterrupts()
Definition: bma220.cxx:479
TAP_SAMP_T
Definition: bma220.hpp:240
THRESHOLD_BITS_T
Definition: bma220.hpp:143
uint8_t getInterruptEnables2()
Definition: bma220.cxx:463
std::vector< float > getAccelerometer()
Definition: bma220.cxx:170
bool setAccelerometerScale(FSL_RANGE_T scale)
Definition: bma220.cxx:115
L_HYST_DUR_LOW_BITS_T
Definition: bma220.hpp:162
bool setSleepDuration(SLEEP_DUR_T dur)
Definition: bma220.cxx:254
bool setInterruptEnables1(uint8_t bits)
Definition: bma220.cxx:440
bool setInterruptEnables2(uint8_t bits)
Definition: bma220.cxx:450
bool setSlopeThreshold(uint8_t thresh)
Definition: bma220.cxx:394
bool setLowGThreshold(uint8_t thresh)
Definition: bma220.cxx:265
ENABLE_CONFIG3_BITS_T
Definition: bma220.hpp:358
SLOPE_CONFIG_BITS_T
Definition: bma220.hpp:201
void uninstallISR()
Definition: bma220.cxx:504
I2C_WATCHDOG_BITS_T
Definition: bma220.hpp:467
TAP_CONFIG2_BITS_T
Definition: bma220.hpp:221
uint8_t getInterruptStatus1()
Definition: bma220.cxx:419
C++ API for the kxtj3 driver.
Definition: a110x.hpp:29
uint8_t getChipRevision()
Definition: bma220.cxx:182
FSL_RANGE_T
Definition: bma220.hpp:445
bool setHighGThreshold(uint8_t thresh)
Definition: bma220.cxx:278
void update()
Definition: bma220.cxx:73
REG_T
Definition: bma220.hpp:83
bool enableSlopeFilter(bool filt)
Definition: bma220.cxx:407
uint8_t suspend()
Definition: bma220.cxx:232
CONFIG_ORIENT_T getOrient()
Definition: bma220.cxx:424
TAP_CONFIG_BITS_T
Definition: bma220.hpp:181
bool setFilterConfig(FILTER_CONFIG_T filter)
Definition: bma220.cxx:187
void installISR(int gpio, mraa::Edge level, void(*isr)(void *), void *arg)
Definition: bma220.cxx:491
SBIST_T
Definition: bma220.hpp:457
bool enableAxes(bool xEn, bool yEn, bool zEn)
Definition: bma220.cxx:210
ENABLE_CONFIG_BITS_T
Definition: bma220.hpp:309
INT_STATUS1_BITS_T
Definition: bma220.hpp:261
CONFIG2_LAT_T
Definition: bma220.hpp:344
FILTER_CONFIG_T
Definition: bma220.hpp:412
bool setInterruptLatch(CONFIG2_LAT_T lat)
Definition: bma220.cxx:468
bool writeReg(uint8_t reg, uint8_t val)
Definition: bma220.cxx:102
ENABLE_CONFIG2_BITS_T
Definition: bma220.hpp:323
bool setHighGDuration(uint8_t dur)
Definition: bma220.cxx:330
bool sleep(bool enable)
Definition: bma220.cxx:242
API for the BMA220 3-axis Accelerometer.
Definition: bma220.hpp:71
CONFIG_ORIENT_T
Definition: bma220.hpp:282
H_HYST_DUR_HIGH_BITS_T
Definition: bma220.hpp:124
bool setSlopeDuration(uint8_t dur)
Definition: bma220.cxx:381
TAP_ORIENT_BLOCK_T
Definition: bma220.hpp:251
uint8_t getChipID()
Definition: bma220.cxx:177
INT_STATUS2_BITS_T
Definition: bma220.hpp:296
bool setHighGHysteresis(uint8_t hyst)
Definition: bma220.cxx:317
bool setLowGDuration(uint8_t dur)
Definition: bma220.cxx:304
bool setTapThreshold(uint8_t thresh)
Definition: bma220.cxx:356
SLEEP_DUR_T
Definition: bma220.hpp:380
BMA220(int bus=BMA220_I2C_BUS, uint8_t addr=BMA220_DEFAULT_ADDR)
Definition: bma220.cxx:37
bool setLowGHysteresis(uint8_t hyst)
Definition: bma220.cxx:291
bool setSerialHighBW(bool high)
Definition: bma220.cxx:198
~BMA220()
Definition: bma220.cxx:68