upm  1.3.0
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bma220.hpp
1 /*
2  * Author: Jon Trulson <jtrulson@ics.com>
3  * Copyright (c) 2015 Intel Corporation.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #include <string>
27 #include <mraa/common.hpp>
28 #include <mraa/i2c.hpp>
29 #include <mraa/gpio.hpp>
30 
31 #define BMA220_I2C_BUS 0
32 #define BMA220_DEFAULT_ADDR 0x0a
33 
34 namespace upm {
35 
70  class BMA220 {
71  public:
72 
73  // NOTE: reserved registers must not be written into or read from.
74  // Reserved bitfields must always be 0. The registers aren't
75  // named in the datasheet, so I made up some hopefully useful
76  // names for them. The whole I2C register map design is a little
77  // strange, IMO.
78 
82  typedef enum {
83  REG_CHIPID = 0x00,
84  REG_REVISIONID = 0x02,
85 
86  // 2 lsb bits of ACC regs are always 0, yeilding 6 bits resolution
87  REG_ACC_X = 0x04, // acceleration data
88  REG_ACC_Y = 0x06,
89  REG_ACC_Z = 0x08,
90 
91  REG_H_HYST_DUR = 0x0a, // high hysteresis/dur
92  REG_THRESHOLD = 0x0c, // high/low threshold
93  REG_L_HYST_DUR = 0x0e, // low hysteresis/dur
94 
95  REG_TAP_CONFIG = 0x10,
96 
97  REG_SLOPE_CONFIG = 0x12,
98  REG_TAP_CONFIG2 = 0x14,
99 
100  REG_INT_STATUS1 = 0x16,
101  REG_INT_STATUS2 = 0x18,
102 
103  REG_ENABLE_CONFIG = 0x1a,
104  REG_ENABLE_CONFIG2 = 0x1c,
105  REG_ENABLE_CONFIG3 = 0x1e,
106 
107  REG_FILTER_CONFIG = 0x20,
108 
109  REG_SBIST_FSL_CONFIG = 0x22, // self test and full scale range
110 
111  // 0x24 - 0x2c reserved
112 
113  REG_I2C_WATCHDOG = 0x2e, // + SPI 3-wire mode
114 
115  REG_SUSPEND = 0x30,
116  REG_SOFTRESET = 0x32
117  } REG_T;
118 
119 
123  typedef enum {
124  H_HYST_DUR_HIGH_DUR0 = 0x01,
125  H_HYST_DUR_HIGH_DUR1 = 0x02,
126  H_HYST_DUR_HIGH_DUR2 = 0x04,
127  H_HYST_DUR_HIGH_DUR3 = 0x08,
128  H_HYST_DUR_HIGH_DUR4 = 0x10,
129  H_HYST_DUR_HIGH_DUR5 = 0x20,
130  _H_HYST_DUR_HIGH_DUR_MASK = 63,
131  _H_HYST_DUR_HIGH_DUR_SHIFT = 0,
132 
133  H_HYST_DUR_HIGH_HY1 = 0x40,
134  H_HYST_DUR_HIGH_HY2 = 0x80,
135  _H_HYST_DUR_HIGH_HY_MASK = 3,
136  _H_HYST_DUR_HIGH_HY_SHIFT = 6
138 
142  typedef enum {
143  THRESHOLD_HIGH0 = 0x01,
144  THRESHOLD_HIGH1 = 0x02,
145  THRESHOLD_HIGH2 = 0x04,
146  THRESHOLD_HIGH3 = 0x08,
147  _THRESHOLD_HIGH_MASK = 15,
148  _THRESHOLD_HIGH_SHIFT = 0,
149 
150  THRESHOLD_LOW0 = 0x10,
151  THRESHOLD_LOW1 = 0x20,
152  THRESHOLD_LOW2 = 0x40,
153  THRESHOLD_LOW3 = 0x80,
154  _THRESHOLD_LOW_MASK = 15,
155  _THRESHOLD_LOW_SHIFT = 4
157 
161  typedef enum {
162  L_HYST_DUR_LOW_DUR0 = 0x01,
163  L_HYST_DUR_LOW_DUR1 = 0x02,
164  L_HYST_DUR_LOW_DUR2 = 0x04,
165  L_HYST_DUR_LOW_DUR3 = 0x08,
166  L_HYST_DUR_LOW_DUR4 = 0x10,
167  L_HYST_DUR_LOW_DUR5 = 0x20,
168  _L_HYST_DUR_LOW_DUR_MASK = 63,
169  _L_HYST_DUR_LOW_DUR_SHIFT = 0,
170 
171  L_HYST_DUR_LOW_HY1 = 0x40,
172  L_HYST_DUR_LOW_HY2 = 0x80,
173  _L_HYST_DUR_LOW_HY_MASK = 3,
174  _L_HYST_DUR_LOW_HY_SHIFT = 6
176 
180  typedef enum {
181  TAP_CONFIG_DUR0 = 0x01,
182  TAP_CONFIG_DUR1 = 0x02,
183  TAP_CONFIG_DUR2 = 0x04,
184  _TAP_CONFIG_DUR_MASK = 7,
185  _TAP_CONFIG_DUR_SHIFT = 0,
186 
187  TAP_CONFIG_THRESH0 = 0x08,
188  TAP_CONFIG_THRESH1 = 0x10,
189  TAP_CONFIG_THRESH2 = 0x20,
190  TAP_CONFIG_THRESH3 = 0x40,
191  _TAP_CONFIG_THRESH_MASK = 15,
192  _TAP_CONFIG_THRESH_SHIFT = 3,
193 
194  TAP_CONFIG_FILTER = 0x80
196 
200  typedef enum {
201  SLOPE_CONFIG_DUR0 = 0x01,
202  SLOPE_CONFIG_DUR1 = 0x02,
203  _SLOPE_CONFIG_DUR_MASK = 3,
204  _SLOPE_CONFIG_DUR_SHIFT = 0,
205 
206  SLOPE_CONFIG_THRESH0 = 0x04,
207  SLOPE_CONFIG_THRESH1 = 0x08,
208  SLOPE_CONFIG_THRESH2 = 0x10,
209  SLOPE_CONFIG_THRESH3 = 0x20,
210  _SLOPE_CONFIG_THRESH_MASK = 15,
211  _SLOPE_CONFIG_THRESH_SHIFT = 2,
212 
213  SLOPE_CONFIG_FILTER = 0x40,
214  SLOPE_CONFIG_ORIENT_EX = 0x80 // exchange x and z axis for orient
216 
220  typedef enum {
221  TAP_CONFIG2_SAMP0 = 0x01,
222  TAP_CONFIG2_SAMP1 = 0x02,
223  _TAP_CONFIG2_SAMP_MASK = 3,
224  _TAP_CONFIG2_SAMP_SHIFT = 0,
225 
226  TAP_CONFIG2_ORIENT_BLOCK0 = 0x04,
227  TAP_CONFIG2_ORIENT_BLOCK1 = 0x08,
228  _TAP_CONFIG2_ORIENT_BLOCK_MASK = 3,
229  _TAP_CONFIG2_ORIENT_BLOCK_SHIFT = 2,
230 
231  TAP_CONFIG2_TIP_EN = 0x10
232 
233  // 0x20-0x80 reserved
235 
239  typedef enum {
240  TAP_SAMP_2 = 0, // 2 data samples after wakeup
241  TAP_SAMP_4 = 1,
242  TAP_SAMP_8 = 2,
243  TAP_SAMP_16 = 3
244  } TAP_SAMP_T;
245 
250  typedef enum {
251  TAP_ORIENT_BLOCK_0 = 0, // orient blocking disabled
252  TAP_ORIENT_BLOCK_2 = 1, // |z|>0.9g OR |x|+|y| < 0.2g OR m<0.2g
253  TAP_ORIENT_BLOCK_3 = 2, // |z|>0.9g OR |x|+|y| < 0.3g OR m<0.3g
254  TAP_ORIENT_BLOCK_4 = 3, // |z|>0.9g OR |x|+|y| < 0.4g OR m<0.4g
256 
260  typedef enum {
261  INT_STATUS1_SIGN = 0x01,
262  INT_STATUS1_FIRST_Z = 0x02,
263  INT_STATUS1_FIRST_Y = 0x04,
264  INT_STATUS1_FIRST_X = 0x08,
265 
266  INT_STATUS1_ORIENT0 = 0x10,
267  INT_STATUS1_ORIENT1 = 0x20,
268  INT_STATUS1_ORIENT2 = 0x40,
269  _INT_STATUS1_ORIENT_MASK = 7,
270  _INT_STATUS1_ORIENT_SHIFT = 4,
271 
272  INT_STATUS1_ORIENT_INT = 0x80 // orient intr was generated
274 
281  typedef enum {
282  CONFIG_ORI_UP_PORT_UPRIGHT = 0, // up portrait
283  CONFIG_ORI_UP_PORT_UPSIDE_DOWN = 1,
284  CONFIG_ORI_UP_LAND_LEFT = 2, // landscape
285  CONFIG_ORI_UP_LAND_RIGHT = 3,
286  CONFIG_ORI_DN_PORT_UPRIGHT = 4, // down portrait
287  CONFIG_ORI_DN_PORT_UPSIDE_DOWN = 5,
288  CONFIG_ORI_DN_LAND_LEFT = 6, // landscape
289  CONFIG_ORI_DN_LAND_RIGHT = 7
290  } CONFIG_ORIENT_T;
291 
295  typedef enum {
296  INT_STATUS2_SLOPE = 0x01,
297  INT_STATUS2_DATA = 0x02,
298  INT_STATUS2_HIGH = 0x04,
299  INT_STATUS2_LOW = 0x08,
300  INT_STATUS2_TAP = 0x10
301 
302  // 0x20-0x80 reserved
304 
308  typedef enum {
309  ENABLE_CONFIG_TT_Z = 0x01,
310  ENABLE_CONFIG_TT_Y = 0x02,
311  ENABLE_CONFIG_TT_X = 0x04,
312  ENABLE_CONFIG_SLOPE_Z = 0x08,
313  ENABLE_CONFIG_SLOPE_Y = 0x10,
314  ENABLE_CONFIG_SLOPE_X = 0x20,
315  ENABLE_CONFIG_ORIENT = 0x40,
316  ENABLE_CONFIG_DATA = 0x80
318 
322  typedef enum {
323  ENABLE_CONFIG2_HIGH_Z = 0x01,
324  ENABLE_CONFIG2_HIGH_Y = 0x02,
325  ENABLE_CONFIG2_HIGH_X = 0x04,
326 
327  ENABLE_CONFIG2_LOW = 0x08,
328 
329  ENABLE_CONFIG2_LAT_INT0 = 0x10, // interrupt latching
330  ENABLE_CONFIG2_LAT_INT1 = 0x20,
331  ENABLE_CONFIG2_LAT_INT2 = 0x40,
332  _ENABLE_CONFIG2_LAT_INT_MASK = 7,
333  _ENABLE_CONFIG2_LAT_INT_SHIFT = 4,
334 
335  ENABLE_CONFIG2_RESET_INT = 0x80 // reset interrupts
337 
343  typedef enum {
344  CONFIG2_LAT_UNLATCH = 0, // unlatched intrs
345  CONFIG2_LAT_0_25 = 1, // latch intr for 0.25s
346  CONFIG2_LAT_0_5 = 2, // latch intr for 0.5s
347  CONFIG2_LAT_1 = 3, // latch intr for 1s
348  CONFIG2_LAT_2 = 4, // latch intr for 2s
349  CONFIG2_LAT_4 = 5, // latch intr for 4s
350  CONFIG2_LAT_8 = 6, // latch intr for 8s
351  CONFIG2_LAT_PERM = 7 // latch permanently
352  } CONFIG2_LAT_T;
353 
357  typedef enum {
358  ENABLE_CONFIG3_Z_CHAN = 0x01,
359  ENABLE_CONFIG3_Y_CHAN = 0x02,
360  ENABLE_CONFIG3_X_CHAN = 0x04,
361 
362  ENABLE_CONFIG3_SLEEP_DUR0 = 0x08,
363  ENABLE_CONFIG3_SLEEP_DUR1 = 0x10,
364  ENABLE_CONFIG3_SLEEP_DUR2 = 0x20,
365  _ENABLE_CONFIG3_SLEEP_DUR_MASK = 7,
366  _ENABLE_CONFIG3_SLEEP_DUR_SHIFT = 3,
367 
368  ENABLE_CONFIG3_SLEEP_EN = 0x40
369 
370  // 0x80 reserved
372 
379  typedef enum {
380  SLEEP_DUR_2MS = 0, // 2 ms
381  SLEEP_DUR_10MS = 1,
382  SLEEP_DUR_25MS = 2,
383  SLEEP_DUR_50MS = 3,
384  SLEEP_DUR_100MS = 4,
385  SLEEP_DUR_500MS = 5,
386  SLEEP_DUR_1S = 6, // 1 second
387  SLEEP_DUR_2S = 7
388  } SLEEP_DUR_T;
389 
393  typedef enum {
394  FILTER_CONFIG_FILTER0 = 0x01,
395  FILTER_CONFIG_FILTER1 = 0x02,
396  FILTER_CONFIG_FILTER2 = 0x04,
397  FILTER_CONFIG_FILTER3 = 0x08,
398  _FILTER_CONFIG_FILTER_MASK = 15,
399  _FILTER_CONFIG_FILTER_SHIFT = 0,
400 
401  // 0x10-0x40 reserved
402 
403  FILTER_CONFIG_SERIAL_HIGH_BW = 0x80
405 
411  typedef enum {
412  FILTER_CONFIG_1KHZ = 0, // 1Khz
413  FILTER_CONFIG_500HZ = 1,
414  FILTER_CONFIG_250HZ = 2,
415  FILTER_CONFIG_125HZ = 3,
416  FILTER_CONFIG_64HZ = 4,
417  FILTER_CONFIG_32HZ = 5
418  } FILTER_CONFIG_T;
419 
423  typedef enum {
424  REG_SBIST_FSL_RANGE0 = 0x01, // full scale range
425  REG_SBIST_FSL_RANGE1 = 0x02,
426  _REG_SBIST_FSL_RANGE_MASK = 3,
427  _REG_SBIST_FSL_RANGE_SHIFT = 0,
428 
429  REG_SBIST_FSL_SBIST0 = 0x04, // self test enables
430  REG_SBIST_FSL_SBIST1 = 0x08,
431  _REG_SBIST_FSL_SBIST_MASK = 3,
432  _REG_SBIST_FSL_SBIST_SHIFT = 2,
433 
434  REG_SBIST_FSL_SBIST_SIGN = 0x10 // signedness of self test
435 
436  // 0x20-0x80 reserved
438 
444  typedef enum {
445  FSL_RANGE_2G = 0, // 2G FSL
446  FSL_RANGE_4G = 1,
447  FSL_RANGE_8G = 2,
448  FSL_RANGE_16G = 3
449  } FSL_RANGE_T;
450 
456  typedef enum {
457  SBIST_OFF = 0, // self test off
458  SBIST_X = 1, // self test X
459  SBIST_Y = 2,
460  SBIST_Z = 3
461  } SBIST_T;
462 
466  typedef enum {
467  I2C_WATCHDOG_SPI3 = 0x01, // SPI 3wire mode (SPI not supported)
468 
469  I2C_WATCHDOG_TO_SEL = 0x02,
470  I2C_WATCHDOG_TO_EN = 0x04
471 
472  // 0x08-0x80 reserved
474 
475 
482  BMA220(int bus=BMA220_I2C_BUS, uint8_t addr=BMA220_DEFAULT_ADDR);
483 
487  ~BMA220();
488 
492  void update();
493 
500  uint8_t readReg(uint8_t reg);
501 
509  bool writeReg(uint8_t reg, uint8_t val);
510 
516  uint8_t getChipID();
517 
523  uint8_t getChipRevision();
524 
532 
540  void getAccelerometer(float *x, float *y, float *z);
541 
542 #if defined(SWIGJAVA) || defined(JAVACALLBACK)
543 
548  float *getAccelerometer();
549 #endif
550 
557  bool setFilterConfig(FILTER_CONFIG_T filter);
558 
567  bool setSerialHighBW(bool high);
568 
577  bool enableAxes(bool xEn, bool yEn, bool zEn);
578 
585  uint8_t suspend();
586 
593  uint8_t softReset();
594 
603  bool sleep(bool enable);
604 
612  bool setSleepDuration(SLEEP_DUR_T dur);
613 
620  bool setLowGThreshold(uint8_t thresh);
621 
628  bool setHighGThreshold(uint8_t thresh);
629 
636  bool setLowGHysteresis(uint8_t hyst);
637 
644  bool setLowGDuration(uint8_t dur);
645 
652  bool setHighGHysteresis(uint8_t hyst);
653 
660  bool setHighGDuration(uint8_t dur);
661 
668  bool setTapDuration(uint8_t dur);
669 
676  bool setTapThreshold(uint8_t thresh);
677 
684  bool enableTapFilter(bool filt);
685 
692  bool setSlopeDuration(uint8_t dur);
693 
700  bool setSlopeThreshold(uint8_t thresh);
701 
708  bool enableSlopeFilter(bool filt);
709 
715  uint8_t getInterruptStatus1();
716 
723 
729  uint8_t getInterruptStatus2();
730 
737  bool setInterruptEnables1(uint8_t bits);
738 
744  uint8_t getInterruptEnables1();
745 
752  bool setInterruptEnables2(uint8_t bits);
753 
759  uint8_t getInterruptEnables2();
760 
768 
777  bool resetInterrupts();
778 
779 #if defined(SWIGJAVA) || defined(JAVACALLBACK)
780  void installISR(int gpio, mraa::Edge level, jobject runnable);
781 #else
782 
792  void installISR(int gpio, mraa::Edge level,
793  void (*isr)(void *), void *arg);
794 #endif
795 
800  void uninstallISR();
801 
802  protected:
803  mraa::I2c m_i2c;
804  mraa::Gpio *m_gpioIntr;
805  uint8_t m_addr;
806 
807  // uncompensated accelerometer values
808  float m_accelX;
809  float m_accelY;
810  float m_accelZ;
811 
812  // accelerometer full scale
813  float m_accelScale;
814 
815  private:
816  /* Disable implicit copy and assignment operators */
817  BMA220(const BMA220&) = delete;
818  BMA220 &operator=(const BMA220&) = delete;
819 
823  void updateAccelerometer();
824  // Adding a private function definition for java bindings
825 #if defined(SWIGJAVA) || defined(JAVACALLBACK)
826  void installISR(int gpio, mraa::Edge level,
827  void (*isr)(void *), void *arg);
828 #endif
829 
830  };
831 }
832 
833 
uint8_t readReg(uint8_t reg)
Definition: bma220.cxx:97
uint8_t softReset()
Definition: bma220.cxx:239
SBIST_FSL_CONFIG_BITS_T
Definition: bma220.hpp:423
bool enableTapFilter(bool filt)
Definition: bma220.cxx:371
FILTER_CONFIG_BITS_T
Definition: bma220.hpp:393
uint8_t getInterruptEnables1()
Definition: bma220.cxx:447
bool setTapDuration(uint8_t dur)
Definition: bma220.cxx:345
uint8_t getInterruptStatus2()
Definition: bma220.cxx:437
bool resetInterrupts()
Definition: bma220.cxx:481
TAP_SAMP_T
Definition: bma220.hpp:239
THRESHOLD_BITS_T
Definition: bma220.hpp:142
void getAccelerometer(float *x, float *y, float *z)
Definition: bma220.cxx:158
uint8_t getInterruptEnables2()
Definition: bma220.cxx:465
bool setAccelerometerScale(FSL_RANGE_T scale)
Definition: bma220.cxx:115
L_HYST_DUR_LOW_BITS_T
Definition: bma220.hpp:161
bool setSleepDuration(SLEEP_DUR_T dur)
Definition: bma220.cxx:256
bool setInterruptEnables1(uint8_t bits)
Definition: bma220.cxx:442
bool setInterruptEnables2(uint8_t bits)
Definition: bma220.cxx:452
bool setSlopeThreshold(uint8_t thresh)
Definition: bma220.cxx:396
bool setLowGThreshold(uint8_t thresh)
Definition: bma220.cxx:267
ENABLE_CONFIG3_BITS_T
Definition: bma220.hpp:357
SLOPE_CONFIG_BITS_T
Definition: bma220.hpp:200
void uninstallISR()
Definition: bma220.cxx:521
I2C_WATCHDOG_BITS_T
Definition: bma220.hpp:466
TAP_CONFIG2_BITS_T
Definition: bma220.hpp:220
uint8_t getInterruptStatus1()
Definition: bma220.cxx:421
uint8_t getChipRevision()
Definition: bma220.cxx:184
FSL_RANGE_T
Definition: bma220.hpp:444
bool setHighGThreshold(uint8_t thresh)
Definition: bma220.cxx:280
void update()
Definition: bma220.cxx:73
REG_T
Definition: bma220.hpp:82
bool enableSlopeFilter(bool filt)
Definition: bma220.cxx:409
uint8_t suspend()
Definition: bma220.cxx:234
CONFIG_ORIENT_T getOrient()
Definition: bma220.cxx:426
TAP_CONFIG_BITS_T
Definition: bma220.hpp:180
bool setFilterConfig(FILTER_CONFIG_T filter)
Definition: bma220.cxx:189
void installISR(int gpio, mraa::Edge level, void(*isr)(void *), void *arg)
Definition: bma220.cxx:507
SBIST_T
Definition: bma220.hpp:456
bool enableAxes(bool xEn, bool yEn, bool zEn)
Definition: bma220.cxx:212
ENABLE_CONFIG_BITS_T
Definition: bma220.hpp:308
INT_STATUS1_BITS_T
Definition: bma220.hpp:260
CONFIG2_LAT_T
Definition: bma220.hpp:343
FILTER_CONFIG_T
Definition: bma220.hpp:411
bool setInterruptLatch(CONFIG2_LAT_T lat)
Definition: bma220.cxx:470
bool writeReg(uint8_t reg, uint8_t val)
Definition: bma220.cxx:102
ENABLE_CONFIG2_BITS_T
Definition: bma220.hpp:322
bool setHighGDuration(uint8_t dur)
Definition: bma220.cxx:332
bool sleep(bool enable)
Definition: bma220.cxx:244
API for the BMA220 3-axis Accelerometer.
Definition: bma220.hpp:70
CONFIG_ORIENT_T
Definition: bma220.hpp:281
H_HYST_DUR_HIGH_BITS_T
Definition: bma220.hpp:123
bool setSlopeDuration(uint8_t dur)
Definition: bma220.cxx:383
TAP_ORIENT_BLOCK_T
Definition: bma220.hpp:250
uint8_t getChipID()
Definition: bma220.cxx:179
INT_STATUS2_BITS_T
Definition: bma220.hpp:295
bool setHighGHysteresis(uint8_t hyst)
Definition: bma220.cxx:319
bool setLowGDuration(uint8_t dur)
Definition: bma220.cxx:306
bool setTapThreshold(uint8_t thresh)
Definition: bma220.cxx:358
SLEEP_DUR_T
Definition: bma220.hpp:379
BMA220(int bus=BMA220_I2C_BUS, uint8_t addr=BMA220_DEFAULT_ADDR)
Definition: bma220.cxx:37
bool setLowGHysteresis(uint8_t hyst)
Definition: bma220.cxx:293
bool setSerialHighBW(bool high)
Definition: bma220.cxx:200
~BMA220()
Definition: bma220.cxx:68