upm  1.6.0
Sensor/Actuator repository for libmraa (v1.9.0)
lsm9ds0.hpp
1 /*
2  * Author: Jon Trulson <jtrulson@ics.com>
3  * Copyright (c) 2015 Intel Corporation.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #include <string>
27 #include <vector>
28 #include <mraa/common.hpp>
29 #include <mraa/i2c.hpp>
30 
31 #include <mraa/gpio.hpp>
32 
33 #define LSM9DS0_I2C_BUS 1
34 #define LSM9DS0_DEFAULT_XM_ADDR 0x1d
35 #define LSM9DS0_DEFAULT_GYRO_ADDR 0x6b
36 
37 namespace upm {
38 
80  class LSM9DS0 {
81  public:
82 
83  // NOTE: reserved registers must not be written into or permanent
84  // damage to the device can result. Reserved bitfields must
85  // always be 0.
86 
87  // There are two sub-devices within this device - the
88  // Accelerometer and Magnetometer (XM) and the Gyroscope (G), each
89  // with their own I2C address.
90 
94  typedef enum {
95  // 0x00-0x0e reserved
96 
97  REG_WHO_AM_I_G = 0x0f, // should be 0xd4
98 
99  // 0x10-0x1f reserved
100 
101  REG_CTRL_REG1_G = 0x20,
102  REG_CTRL_REG2_G = 0x21,
103  REG_CTRL_REG3_G = 0x22,
104  REG_CTRL_REG4_G = 0x23,
105  REG_CTRL_REG5_G = 0x24,
106 
107  REG_REFERENCE_G = 0x25,
108 
109  // 0x26 reserved
110 
111  REG_STATUS_REG_G = 0x27,
112 
113  REG_OUT_X_L_G = 0x28, // gyro output, X axis, LSB
114  REG_OUT_X_H_G = 0x29, // gyro output, X axis, MSB
115  REG_OUT_Y_L_G = 0x2a,
116  REG_OUT_Y_H_G = 0x2b,
117  REG_OUT_Z_L_G = 0x2c,
118  REG_OUT_Z_H_G = 0x2d,
119 
120  REG_FIFO_CTRL_REG_G = 0x2e,
121  REG_FIFO_SRC_REG_G = 0x2f,
122 
123  REG_INT1_CFG_G = 0x30,
124  REG_INT1_SRC_G = 0x31,
125 
126  REG_INT1_TSH_XH_G = 0x32, // interrupt threshold registers
127  REG_INT1_TSH_XL_G = 0x33,
128  REG_INT1_TSH_YH_G = 0x34,
129  REG_INT1_TSH_YL_G = 0x35,
130  REG_INT1_TSH_ZH_G = 0x36,
131  REG_INT1_TSH_ZL_G = 0x37,
132 
133  // See fig 19 & 20 and preceeding description in the datasheet
134  // on how to use this register
135  REG_INT1_DURATION_G = 0x38
136  } REG_G_T;
137 
141  typedef enum {
142  CTRL_REG1_G_YEN = 0x01, // Y enable, odd ordering...
143  CTRL_REG1_G_XEN = 0x02,
144  CTRL_REG1_G_ZEN = 0x04,
145  CTRL_REG1_G_PD = 0x08, // power down (0)
146 
147  CTRL_REG1_G_BW0 = 0x10, // bandwidth
148  CTRL_REG1_G_BW1 = 0x20,
149  _CTRL_REG1_G_BW_MASK = 3,
150  _CTRL_REG1_G_BW_SHIFT = 4,
151 
152  CTRL_REG1_G_DR0 = 0x40, // data rate
153  CTRL_REG1_G_DR1 = 0x80,
154  _CTRL_REG1_G_DR_MASK = 3,
155  _CTRL_REG1_G_DR_SHIFT = 6,
156 
157  // The following are synthetic register and shift/mask
158  // definitions. Together both BW and DR setup the device for a
159  // specific output data rate (ODR) and cutoff frequency. These
160  // definitions allow us to use a more informative configuration
161  // for these 4 bits, rather than having the user go to the
162  // datasheet to figure out what to put for those values in order
163  // to get the desired ODR/cutoff. These are the values we will
164  // use in this driver.
165 
166  CTRL_REG1_G_ODR0 = 0x10, // BW0
167  CTRL_REG1_G_ODR1 = 0x20, // BW1
168  CTRL_REG1_G_ODR2 = 0x40, // DR0
169  CTRL_REG1_G_ODR3 = 0x80, // DR1
170  _CTRL_REG1_G_ODR_MASK = 15,
171  _CTRL_REG1_G_ODR_SHIFT = 4
173 
177  typedef enum {
178  G_ODR_95_12_5 = 0, // ODR = 95Hz, cutoff = 12.5
179  G_ODR_95_25 = 1, // ODR = 95Hz, cutoff = 25
180  // Other two (2 and 3) are the same (95_25)
181 
182  G_ODR_190_12_5 = 4,
183  G_ODR_190_25 = 5,
184  G_ODR_190_50 = 6,
185  G_ODR_190_70 = 7,
186 
187  G_ODR_380_20 = 8,
188  G_ODR_380_25 = 9,
189  G_ODR_380_50 = 10,
190  G_ODR_380_100 = 11,
191 
192  G_ODR_760_30 = 12,
193  G_ODR_760_35 = 13,
194  G_ODR_760_50 = 14,
195  G_ODR_760_100 = 15
196  } G_ODR_T;
197 
201  typedef enum {
202  CTRL_REG2_G_HPCF0 = 0x01, // high-pass cutoff freq
203  CTRL_REG2_G_HPCF1 = 0x02,
204  CTRL_REG2_G_HPCF2 = 0x04,
205  CTRL_REG2_G_HPCF3 = 0x08,
206  _CTRL_REG2_G_HPCF_MASK = 15,
207  _CTRL_REG2_G_HPCF_SHIFT = 0,
208 
209  CTRL_REG2_G_HPM0 = 0x10, // high-pass filter mode
210  CTRL_REG2_G_HPM1 = 0x20,
211  _CTRL_REG2_G_HPM_MASK = 3,
212  _CTRL_REG2_G_HPM_SHIFT = 4,
213 
214  // 0x40, 0x80 reserved
216 
224  typedef enum {
225  G_HPCF_7_2 = 0, // 7.2 Hz (if ODR is 95Hz)
226  G_HPCF_3_5 = 1,
227  G_HPCF_1_8 = 2,
228  G_HPCF_0_9 = 3, // 0.9Hz
229  G_HPCF_0_45 = 4,
230  G_HPCF_0_18 = 5,
231  G_HPCF_0_09 = 6,
232  G_HPCF_0_045 = 7,
233  G_HPCF_0_018 = 8,
234  G_HPCF_0_009 = 9
235 
236  // 10-15 unused
237  } G_HPCF_T;
238 
243  typedef enum {
244  G_HPM_NORMAL_RESET_HPF = 0, // reset reading (HP_RESET_FILTER)
245  G_HPM_REFERENCE = 1, // REF signal for filtering
246  G_HPM_NORMAL = 2, // normal mode
247  G_HPM_AUTORESET_ON_INTR = 3 // autoreset in interrupt event
248  } G_HPM_T;
249 
253  typedef enum {
254  CTRL_REG3_G_I2_EMPTY = 0x01, // FIFO empty on DRDY_G
255  CTRL_REG3_G_I2_ORUN = 0x02, // FIFO Overrun intr
256  CTRL_REG3_G_I2_WTM = 0x04, // FIFO watermark intr
257  CTRL_REG3_G_I2_DRDY = 0x08, // data ready on DRDY_G
258  CTRL_REG3_G_PP_OD = 0x10, // push-pull/open drain
259  CTRL_REG3_G_H_LACTIVE = 0x20,
260  CTRL_REG3_G_I1_BOOT = 0x40,
261  CTRL_REG3_G_I1_INT1 = 0x80, // intr enable on INT_G pin
263 
267  typedef enum {
268  CTRL_REG4_G_SIM = 0x01, // SPI mode selection
269 
270  CTRL_REG4_G_ST0 = 0x02, // self test enables
271  CTRL_REG4_G_ST1 = 0x04,
272  _CTRL_REG4_G_ST_MASK = 3,
273  _CTRL_REG4_G_ST_SHIFT = 1,
274 
275  // 0x08 reserved
276 
277  CTRL_REG4_G_FS0 = 0x10, // full scale selection
278  CTRL_REG4_G_FS1 = 0x20,
279  _CTRL_REG4_G_FS_MASK = 3,
280  _CTRL_REG4_G_FS_SHIFT = 4,
281 
282  CTRL_REG4_G_BLE = 0x40, // big/little endian data selection
283  CTRL_REG4_G_BDU = 0x80 // block data updates
285 
290  typedef enum {
291  G_ST_NORMAL = 0, // normal mode
292  G_ST_SELFTEST0 = 1, // x+, y-, z-
293 
294  // 2, reserved
295 
296  G_ST_SELFTEST1 = 3 // x-, y+, z+
297  } G_ST_T;
298 
303  typedef enum {
304  G_FS_245 = 0, // 245 deg/sec
305  G_FS_500 = 1,
306  G_FS_2000 = 2
307  // 3 is also 2000
308  } G_FS_T;
309 
313  typedef enum {
314  CTRL_REG5_G_OUTSEL0 = 0x01, // see fig. 18 in the datasheet
315  CTRL_REG5_G_OUTSEL1 = 0x02,
316  _CTRL_REG5_G_OUTSEL_MASK = 3,
317  _CTRL_REG5_G_OUTSEL_SHIFT = 0,
318 
319  CTRL_REG5_G_INT1SEL0 = 0x04, // see fig. 18 in the datasheet
320  CTRL_REG5_G_INT1SEL1 = 0x08,
321  _CTRL_REG5_G_INT1SEL_MASK = 3,
322  _CTRL_REG5_G_INT1SEL_SHIFT = 2,
323 
324  CTRL_REG5_G_HPEN = 0x10, // HPF enable
325 
326  // 0x20 reserved
327 
328  CTRL_REG5_G_FIFO_EN = 0x40,
329  CTRL_REG5_G_BOOT = 0x80 // reboot memory content
331 
332 
337  typedef enum {
338  G_INT1OUTSEL_0 = 0,
339  G_INT1OUTSEL_1 = 1,
340  G_INT1OUTSEL_2 = 2,
341  G_INT1OUTSEL_3 = 3
342  } G_INT1OUTSEL_T;
343 
347  typedef enum {
348  STATUS_REG_G_XDA = 0x01, // X axis data available
349  STATUS_REG_G_YDA = 0x02,
350  STATUS_REG_G_ZDA = 0x04,
351  STATUS_REG_G_ZYXDA = 0x08, // X, Y, and Z data available
352 
353  STATUS_REG_G_XOR = 0x10, // X data overrun
354  STATUS_REG_G_YOR = 0x20,
355  STATUS_REG_G_ZOR = 0x40,
356  STATUS_REG_G_ZYXOR = 0x80
358 
362  typedef enum {
363  FIFO_CTRL_REG_G_WTM0 = 0x01, // FIFO watermark
364  FIFO_CTRL_REG_G_WTM1 = 0x02,
365  FIFO_CTRL_REG_G_WTM2 = 0x04,
366  FIFO_CTRL_REG_G_WTM3 = 0x08,
367  FIFO_CTRL_REG_G_WTM4 = 0x10,
368  _FIFO_CTRL_REG_G_WTM_MASK = 31,
369  _FIFO_CTRL_REG_G_WTM_SHIFT = 0,
370 
371  FIFO_CTRL_REG_G_FM0 = 0x20, // FIFO mode config
372  FIFO_CTRL_REG_G_FM1 = 0x40,
373  FIFO_CTRL_REG_G_FM2 = 0x80,
374  _FIFO_CTRL_REG_G_FM_MASK = 7,
375  _FIFO_CTRL_REG_G_FM_SHIFT = 5,
377 
378  // FIFO_CTRL_REG_G_WTM (FIFO watermark) is just a numeric value
379  // between 0-31, so we won't enumerate those values.
380 
385  typedef enum {
386  G_FM_BYPASS = 0,
387  G_FM_FIFO = 1,
388  G_FM_STREAM = 2,
389  G_FM_STREAM2FIFO = 3,
390  G_FM_BYPASS2STREAM = 4
391 
392  // 5-7 unused
393  } G_FM_T;
394 
399  typedef enum {
400  FIFO_CTRL_REG_G_FSS0 = 0x01, // FIFO stored data level
401  FIFO_CTRL_REG_G_FSS1 = 0x02,
402  FIFO_CTRL_REG_G_FSS2 = 0x04,
403  FIFO_CTRL_REG_G_FSS3 = 0x08,
404  FIFO_CTRL_REG_G_FSS4 = 0x10,
405  _FIFO_CTRL_REG_G_FSS_MASK = 31,
406  _FIFO_CTRL_REG_G_FSS_SHIFT = 0,
407 
408  FIFO_CTRL_REG_G_EMPTY = 0x20, // FIFO empty
409  FIFO_CTRL_REG_G_OVRN = 0x40, // FIFO overrun
410  FIFO_CTRL_REG_G_WTM = 0x80 // watermark status
412 
417  typedef enum {
418  INT1_CFG_G_XLIE = 0x01, // X Low event interrupt enable
419  INT1_CFG_G_XHIE = 0x02, // X High event interrupt enable
420  INT1_CFG_G_YLIE = 0x04,
421  INT1_CFG_G_YHIE = 0x08,
422  INT1_CFG_G_ZLIE = 0x10,
423  INT1_CFG_G_ZHIE = 0x20,
424 
425  INT1_CFG_G_LIR = 0x40, // latch interrupt request
426  INT1_CFG_G_ANDOR = 0x80 // OR or AND interrupt events
428 
433  typedef enum {
434  INT1_SRC_G_XL = 0x01, // X low interrupt
435  INT1_SRC_G_XH = 0x02, // X high interrupt
436  INT1_SRC_G_YL = 0x04,
437  INT1_SRC_G_YH = 0x08,
438  INT1_SRC_G_ZL = 0x10,
439  INT1_SRC_G_ZH = 0x20,
440 
441  INT1_SRC_G_IA = 0x40 // interrupt active
442 
443  // 0x80 reserved
445 
446  // The following registers are for the Accelerometer (A/X),
447  // Magnetometer (M), and Temperature device.
448 
452  typedef enum {
453  // 0x00-0x04 reserved
454 
455  REG_OUT_TEMP_L_XM = 0x05, // temperature
456  REG_OUT_TEMP_H_XM = 0x06,
457 
458  REG_STATUS_REG_M = 0x07,
459 
460  REG_OUT_X_L_M = 0x08, // magnetometer outputs
461  REG_OUT_X_H_M = 0x09,
462  REG_OUT_Y_L_M = 0x0a,
463  REG_OUT_Y_H_M = 0x0b,
464  REG_OUT_Z_L_M = 0x0c,
465  REG_OUT_Z_H_M = 0x0d,
466 
467  // 0x0e reserved
468 
469  REG_WHO_AM_I_XM = 0x0f,
470 
471  // 0x10, 0x11 reserved
472 
473  REG_INT_CTRL_REG_M = 0x12,
474  REG_INT_SRC_REG_M = 0x13,
475 
476  REG_INT_THS_L_M = 0x14, // magnetometer threshold
477  REG_INT_THS_H_M = 0x15,
478 
479  REG_OFFSET_X_L_M = 0x16,
480  REG_OFFSET_X_H_M = 0x17,
481  REG_OFFSET_Y_L_M = 0x18,
482  REG_OFFSET_Y_H_M = 0x19,
483  REG_OFFSET_Z_L_M = 0x1a,
484  REG_OFFSET_Z_H_M = 0x1b,
485 
486  REG_REFERENCE_X = 0x1c,
487  REG_REFERENCE_Y = 0x1d,
488  REG_REFERENCE_Z = 0x1e,
489 
490  REG_CTRL_REG0_XM = 0x1f,
491  REG_CTRL_REG1_XM = 0x20,
492  REG_CTRL_REG2_XM = 0x21,
493  REG_CTRL_REG3_XM = 0x22,
494  REG_CTRL_REG4_XM = 0x23,
495  REG_CTRL_REG5_XM = 0x24,
496  REG_CTRL_REG6_XM = 0x25,
497  REG_CTRL_REG7_XM = 0x26,
498 
499  REG_STATUS_REG_A = 0x27,
500 
501  REG_OUT_X_L_A = 0x28, // accelerometer outputs
502  REG_OUT_X_H_A = 0x29,
503  REG_OUT_Y_L_A = 0x2a,
504  REG_OUT_Y_H_A = 0x2b,
505  REG_OUT_Z_L_A = 0x2c,
506  REG_OUT_Z_H_A = 0x2d,
507 
508  REG_FIFO_CTRL_REG = 0x2e,
509  REG_FIFO_SRC_REG = 0x2f,
510 
511  REG_INT_GEN_1_REG = 0x30,
512  REG_INT_GEN_1_SRC = 0x31,
513  REG_INT_GEN_1_THS = 0x32,
514  REG_INT_GEN_1_DURATION = 0x33,
515 
516  REG_INT_GEN_2_REG = 0x34,
517  REG_INT_GEN_2_SRC = 0x35,
518  REG_INT_GEN_2_THS = 0x36,
519  REG_INT_GEN_2_DURATION = 0x37,
520 
521  REG_CLICK_CFG = 0x38,
522  REG_CLICK_SRC = 0x39,
523  REG_CLICK_THS = 0x3a,
524 
525  REG_TIME_LIMIT = 0x3b,
526  REG_TIME_LATENCY = 0x3c,
527  REG_TIME_WINDOW = 0x3d,
528 
529  REG_ACT_THS = 0x3e,
530  REG_ACT_DUR = 0x3f
531  } REG_XM_T;
532 
536  typedef enum {
537  STATUS_REG_M_XMDA = 0x01, // X mag axis data available
538  STATUS_REG_M_YMDA = 0x02,
539  STATUS_REG_M_ZMDA = 0x04,
540  STATUS_REG_M_ZYXMDA = 0x08, // X, Y, and Z mag data available
541 
542  STATUS_REG_M_XMOR = 0x10, // X mag data overrun
543  STATUS_REG_M_YMOR = 0x20,
544  STATUS_REG_M_ZMOR = 0x40,
545  STATUS_REG_M_ZYXMOR = 0x80
547 
551  typedef enum {
552  INT_CTRL_REG_M_MIEN = 0x01, // mag interrupt enable
553  INT_CTRL_REG_M_4D = 0x02,
554  INT_CTRL_REG_M_IEL = 0x04, // latch intr request
555  INT_CTRL_REG_M_IEA = 0x08,
556  INT_CTRL_REG_M_PP_OD = 0x10, // push-pull/open drian
557  INT_CTRL_REG_M_ZMIEN = 0x20, // Z mag axis interrupt recognition
558  INT_CTRL_REG_M_YMIEN = 0x40,
559  INT_CTRL_REG_M_XMIEN = 0x80
561 
565  typedef enum {
566  INT_SRC_REG_M_MINT = 0x01,
567  INT_SRC_REG_M_MROI = 0x02,
568  INT_SRC_REG_M_NTH_Z = 0x04,
569  INT_SRC_REG_M_NTH_Y = 0x08,
570  INT_SRC_REG_M_NTH_X = 0x10,
571  INT_SRC_REG_M_PTH_Z = 0x20,
572  INT_SRC_REG_M_PTH_Y = 0x40,
573  INT_SRC_REG_M_PTH_X = 0x80
575 
576 
580  typedef enum {
581  CTRL_REG0_XM_HPIS2 = 0x01, // HPF enable for int generator 2
582  CTRL_REG0_XM_HPIS1 = 0x02,
583 
584  CTRL_REG0_XM_HP_CLICK = 0x04, // HPF enable for click
585 
586  // 0x08,0x10 reserved
587 
588  CTRL_REG0_XM_WTM_LEN = 0x20, // watermark enable
589  CTRL_REG0_XM_FIFO_EN = 0x40, // FIFO enable
590  CTRL_REG0_XM_BOOT = 0x80 // reboot memory content
592 
596  typedef enum {
597  CTRL_REG1_XM_AXEN = 0x01, // accelerometer x axis enable
598  CTRL_REG1_XM_AYEN = 0x02,
599  CTRL_REG1_XM_AZEN = 0x03,
600 
601  CTRL_REG1_XM_BDU = 0x04, // block data update
602 
603  CTRL_REG1_XM_AODR0 = 0x10, // accelerometer output data rate
604  CTRL_REG1_XM_AODR1 = 0x20,
605  CTRL_REG1_XM_AODR2 = 0x40,
606  CTRL_REG1_XM_AODR3 = 0x80,
607  _CTRL_REG1_XM_AODR_MASK = 15,
608  _CTRL_REG1_XM_AODR_SHIFT = 4
610 
614  typedef enum {
615  XM_AODR_PWRDWN = 0, // power down mode
616  XM_AODR_3_125 = 1, // 3.125 Hz
617  XM_AODR_6_25 = 2,
618  XM_AODR_12_5 = 3,
619  XM_AODR_25 = 4, // 25Hz
620  XM_AODR_50 = 5,
621  XM_AODR_100 = 6,
622  XM_AODR_200 = 7,
623  XM_AODR_400 = 8,
624  XM_AODR_800 = 9,
625  XM_AODR_1000 = 10
626  // 11-15 unused
627  } XM_AODR_T;
628 
632  typedef enum {
633  CTRL_REG2_XM_SIM = 0x01,
634 
635  CTRL_REG2_XM_AST0 = 0x02, // accel self-test enable
636  CTRL_REG2_XM_AST1 = 0x04,
637  _CTRL_REG2_XM_AST_MASK = 3,
638  _CTRL_REG2_XM_AST_SHIFT = 1,
639 
640  CTRL_REG2_XM_AFS0 = 0x08, // accel full scale
641  CTRL_REG2_XM_AFS1 = 0x10,
642  CTRL_REG2_XM_AFS2 = 0x20,
643  _CTRL_REG2_XM_AFS_MASK = 7,
644  _CTRL_REG2_XM_AFS_SHIFT = 3,
645 
646  CTRL_REG2_XM_ABW0 = 0x40, // accel anti-alias filter bandwidth
647  CTRL_REG2_XM_ABW1 = 0x80,
648  _CTRL_REG2_XM_ABW_MASK = 3,
649  _CTRL_REG2_XM_ABW_SHIFT = 6
651 
655  typedef enum {
656  XM_AST_NORMAL = 0,
657  XM_AST_POS_SIGN = 1,
658  XM_AST_NEG_SIGN = 2
659  // 3 not allowed
660  } XM_AST_T;
661 
665  typedef enum {
666  XM_AFS_2 = 0, // 2g
667  XM_AFS_4 = 1,
668  XM_AFS_6 = 2,
669  XM_AFS_8 = 3,
670  XM_AFS_16 = 4
671 
672  // 5-7 not used
673  } XM_AFS_T;
674 
678  typedef enum {
679  XM_ABW_773 = 0, // 773Hz
680  XM_ABW_194 = 1, // these two might be inverted (typo in ds)
681  XM_ABW_362 = 2,
682  XM_ABW_50 = 3
683  } XM_ABW_T;
684 
688  typedef enum {
689  CTRL_REG3_XM_P1_EMPTY = 0x01, // INT1_XM pin enables
690  CTRL_REG3_XM_P1_DRDYM = 0x02,
691  CTRL_REG3_XM_P1_DRDYA = 0x04,
692  CTRL_REG3_XM_P1_INTM = 0x08,
693  CTRL_REG3_XM_P1_INT2 = 0x10,
694  CTRL_REG3_XM_P1_INT1 = 0x20,
695  CTRL_REG3_XM_P1_TAP = 0x40,
696  CTRL_REG3_XM_P1_BOOT = 0x80
698 
702  typedef enum {
703  CTRL_REG4_XM_P2_WTM = 0x01, // INT2_XM pin enables
704  CTRL_REG4_XM_P2_OVERRUN = 0x02,
705  CTRL_REG4_XM_P2_DRDYM = 0x04,
706  CTRL_REG4_XM_P2_DRDYA = 0x08,
707  CTRL_REG4_XM_P2_INTM = 0x10,
708  CTRL_REG4_XM_P2_INT2 = 0x20,
709  CTRL_REG4_XM_P2_INT1 = 0x40,
710  CTRL_REG4_XM_P2_TAP = 0x80
712 
716  typedef enum {
717  CTRL_REG5_XM_LIR1 = 0x01, // latch intr 1
718  CTRL_REG5_XM_LIR2 = 0x02, // latch intr 2
719 
720  CTRL_REG5_XM_ODR0 = 0x04, // mag output data rate
721  CTRL_REG5_XM_ODR1 = 0x08,
722  CTRL_REG5_XM_ODR2 = 0x10,
723  _CTRL_REG5_XM_ODR_MASK = 7,
724  _CTRL_REG5_XM_ODR_SHIFT = 2,
725 
726  CTRL_REG5_XM_RES0 = 0x20, // mag resolution
727  CTRL_REG5_XM_RES1 = 0x40,
728  _CTRL_REG5_XM_RES_MASK = 3,
729  _CTRL_REG5_XM_RES_SHIFT = 5,
730 
731  CTRL_REG5_XM_TEMP_EN = 0x80 // temp sensor enable
733 
737  typedef enum {
738  XM_ODR_3_125 = 0, // 3.125Hz
739  XM_ODR_6_25 = 1,
740  XM_ODR_12_5 = 2,
741  XM_ODR_25 = 3,
742  XM_ODR_50 = 4,
743  XM_ODR_100 = 5
744 
745  // 6, 7 reserved
746  } XM_ODR_T;
747 
751  typedef enum {
752  XM_RES_LOW = 0, // low resolution
753 
754  // 1, 2 reserved
755 
756  XM_RES_HIGH = 3,
757  } XM_RES_T;
758 
762  typedef enum {
763  // 0x01-0x10 reserved
764 
765  CTRL_REG6_XM_MFS0 = 0x20,
766  CTRL_REG6_XM_MFS1 = 0x40,
767  _CTRL_REG6_XM_MFS_MASK = 3,
768  _CTRL_REG6_XM_MFS_SHIFT = 5
769 
770  // 0x80 reserved
772 
776  typedef enum {
777  XM_MFS_2 = 0, // +/- 2 gauss
778  XM_MFS_4 = 1,
779  XM_MFS_8 = 2,
780  XM_MFS_12 = 3
781  } XM_MFS_T;
782 
786  typedef enum {
787  CTRL_REG7_XM_MD0 = 0x01, // mag sensor mode
788  CTRL_REG7_XM_MD1 = 0x02,
789  _CTRL_REG7_XM_MD_MASK = 3,
790  _CTRL_REG7_XM_MD_SHIFT = 0,
791 
792  CTRL_REG7_XM_MLP = 0x04, // mag low power mode
793 
794  // 0x08, 0x10 reserved
795 
796  CTRL_REG7_XM_AFDS = 0x20, // filtered acceleration data
797 
798  CTRL_REG7_XM_AHPM0 = 0x40, // accel HPF selection
799  CTRL_REG7_XM_AHPM1 = 0x80,
800  _CTRL_REG7_XM_AHPM_MASK = 3,
801  _CTRL_REG7_XM_AHPM_SHIFT = 6
803 
807  typedef enum {
808  XM_MD_CONTINUOUS = 0, // continuous conversion
809  XM_MD_SINGLE = 1, // single conversion
810  XM_MD_POWERDOWN = 2 // power down mode
811  // 3 is also power down mode, for some odd reason
812  } XM_MD_T;
813 
817  typedef enum {
818  // XM_AHPM_NORMAL_REF: Normal mode (resets x, y and z-axis
819  // reading REFERENCE_X (1Ch), REFERENCE_Y (1Dh) and REFERENCE_Y
820  // (1Dh) registers respectively)
821 
822  XM_AHPM_NORMAL_REF = 0,
823  XM_AHPM_REFERENCE = 1,
824  XM_AHPM_NORMAL = 2,
825  XM_AHPM_AUTORESET = 3 // autoreset on interrupt
826  } XM_AHPM_T;
827 
831  typedef enum {
832  STATUS_REG_A_XADA = 0x01, // X accel axis data available
833  STATUS_REG_A_YADA = 0x02,
834  STATUS_REG_A_ZADA = 0x04,
835  STATUS_REG_A_ZYXADA = 0x08, // X, Y, and Z accel data available
836 
837  STATUS_REG_A_XAOR = 0x10, // X accel data overrun
838  STATUS_REG_A_YAOR = 0x20,
839  STATUS_REG_A_ZAOR = 0x40,
840  STATUS_REG_A_ZYXAOR = 0x80
842 
846  typedef enum {
847  FIFO_CTRL_REG_FTH0 = 0x01, // FIFO watermark/threshold
848  FIFO_CTRL_REG_FTH1 = 0x02,
849  FIFO_CTRL_REG_FTH2 = 0x04,
850  FIFO_CTRL_REG_FTH3 = 0x08,
851  FIFO_CTRL_REG_FTH4 = 0x10,
852  _FIFO_CTRL_REG_FTH_MASK = 31,
853  _FIFO_CTRL_REG_FTH_SHIFT = 0,
854 
855  FIFO_CTRL_REG_FM0 = 0x20, // FIFO mode config
856  FIFO_CTRL_REG_FM1 = 0x40,
857  FIFO_CTRL_REG_FM2 = 0x80,
858  _FIFO_CTRL_REG_FM_MASK = 7,
859  _FIFO_CTRL_REG_FM_SHIFT = 5,
860  } FIFO_CTRL_REG_T;
861 
862  // FIFO_CTRL_REG_FTH (FIFO watermark/threshold) is just a numeric
863  // value between 0-31, so we won't enumerate those values.
864 
869  typedef enum {
870  FM_BYPASS = 0,
871  FM_FIFO = 1,
872  FM_STREAM = 2,
873  FM_STREAM2FIFO = 3,
874  FM_BYPASS2STREAM = 4
875 
876  // 5-7 unused
877  } FM_T;
878 
883  typedef enum {
884  FIFO_CTRL_REG_FSS0 = 0x01, // FIFO stored data level
885  FIFO_CTRL_REG_FSS1 = 0x02,
886  FIFO_CTRL_REG_FSS2 = 0x04,
887  FIFO_CTRL_REG_FSS3 = 0x08,
888  FIFO_CTRL_REG_FSS4 = 0x10,
889  _FIFO_CTRL_REG_FSS_MASK = 31,
890  _FIFO_CTRL_REG_FSS_SHIFT = 0,
891 
892  FIFO_CTRL_REG_EMPTY = 0x20, // FIFO empty
893  FIFO_CTRL_REG_OVRN = 0x40, // FIFO overrun
894  FIFO_CTRL_REG_WTM = 0x80 // watermark status
896 
901  typedef enum {
902  INT_GEN_X_REG_XLIE_XDOWNE = 0x01, // enable intr on X low or dir recog
903  INT_GEN_X_REG_XHIE_XUPE = 0x02,
904  INT_GEN_X_REG_YLIE_YDOWNE = 0x04,
905  INT_GEN_X_REG_YHIE_YUPE = 0x08,
906  INT_GEN_X_REG_ZLIE_ZDOWNE = 0x10,
907  INT_GEN_X_REG_ZHIE_ZUPE = 0x20,
908  INT_GEN_X_REG_6D = 0x40, // enable 6D direction function
909  INT_GEN_X_REG_AOI = 0x80 // AND/OR combination of intrs
911 
916  typedef enum {
917  INT_GEN_X_SRC_XL = 0x01,
918  INT_GEN_X_SRC_XH = 0x02,
919  INT_GEN_X_SRC_YL = 0x04,
920  INT_GEN_X_SRC_YH = 0x08,
921  INT_GEN_X_SRC_ZL = 0x10,
922  INT_GEN_X_SRC_ZH = 0x20,
923  INT_GEN_X_SRC_IA = 0x40
924  // 0x80 reserved
926 
931  typedef enum {
932  INT_GEN_X_THS0 = 0x01, // interrupt threshold
933  INT_GEN_X_THS1 = 0x02,
934  INT_GEN_X_THS2 = 0x04,
935  INT_GEN_X_THS3 = 0x08,
936  INT_GEN_X_THS4 = 0x10,
937  INT_GEN_X_THS5 = 0x20,
938  INT_GEN_X_THS6 = 0x40,
939  _INT_GEN_X_THS_MASK = 127,
940  _INT_GEN_X_THS_SHIFT = 0
941  // 0x80 reserved
943 
948  typedef enum {
949  INT_GEN_X_DUR0 = 0x01, // interrupt duration
950  INT_GEN_X_DUR1 = 0x02,
951  INT_GEN_X_DUR2 = 0x04,
952  INT_GEN_X_DUR3 = 0x08,
953  INT_GEN_X_DUR4 = 0x10,
954  INT_GEN_X_DUR5 = 0x20,
955  INT_GEN_X_DUR6 = 0x40,
956  _INT_GEN_X_DUR_MASK = 127,
957  _INT_GEN_X_DUR_SHIFT = 0
958  // 0x80 reserved
960 
965  typedef enum {
966  CLICK_CONFIG_XS = 0x01, // enable intr single click x
967  CLICK_CONFIG_XD = 0x02, // enable intr double click x
968  CLICK_CONFIG_YS = 0x04,
969  CLICK_CONFIG_YD = 0x08,
970  CLICK_CONFIG_ZS = 0x10,
971  CLICK_CONFIG_ZD = 0x20
972  // 0x40, 0x80 reserved
974 
979  typedef enum {
980  CLICK_SRC_X = 0x01,
981  CLICK_SRC_Y = 0x02,
982  CLICK_SRC_Z = 0x04,
983  CLICK_SRC_SIGN = 0x08,
984  CLICK_SRC_SCLICK = 0x10,
985  CLICK_SRC_DCLICK = 0x20,
986  CLICK_SRC_IA = 0x40
987  // 0x80 reserved
989 
994  typedef enum {
995  CLICK_THS_THS0 = 0x01, // click threshold
996  CLICK_THS_THS1 = 0x02,
997  CLICK_THS_THS2 = 0x04,
998  CLICK_THS_THS3 = 0x08,
999  CLICK_THS_THS4 = 0x10,
1000  CLICK_THS_THS5 = 0x20,
1001  CLICK_THS_THS6 = 0x40,
1002  _CLICK_THS_THS_MASK = 127,
1003  _CLICK_THS_THS_SHIFT = 0
1004  // 0x80 reserved
1005  } CLICK_THS_BITS_T;
1006 
1011  typedef enum {
1012  CLICK_TIME_LIMIT_TLI0 = 0x01,
1013  CLICK_TIME_LIMIT_TLI1 = 0x02,
1014  CLICK_TIME_LIMIT_TLI2 = 0x04,
1015  CLICK_TIME_LIMIT_TLI3 = 0x08,
1016  CLICK_TIME_LIMIT_TLI4 = 0x10,
1017  CLICK_TIME_LIMIT_TLI5 = 0x20,
1018  CLICK_TIME_LIMIT_TLI6 = 0x40,
1019  _CLICK_TIME_LIMIT_TLI_MASK = 127,
1020  _CLICK_TIME_LIMIT_TLI_SHIFT = 0
1021  // 0x80 reserved
1023 
1028  typedef enum {
1029  ACT_THS_ACTH0 = 0x01, // 1 LSb = 16mg (?)
1030  ACT_THS_ACTH1 = 0x02,
1031  ACT_THS_ACTH2 = 0x04,
1032  ACT_THS_ACTH3 = 0x08,
1033  ACT_THS_ACTH4 = 0x10,
1034  ACT_THS_ACTH5 = 0x20,
1035  ACT_THS_ACTH6 = 0x40,
1036  _ACT_THS_ACTH_MASK = 127,
1037  _ACT_THS_ACTH_SHIFT = 0
1038  // 0x80 reserved
1039  } ACT_THS_BITS_T;
1040 
1041  // Driver specific enumerations
1042 
1043  // device enums for read/write regs
1044  typedef enum {
1045  DEV_GYRO,
1046  DEV_XM
1047  } DEVICE_T;
1048 
1049  // interrupt selection for installISR() and uninstallISR()
1050  typedef enum {
1051  INTERRUPT_G_INT, // gyroscope interrupt
1052  INTERRUPT_G_DRDY, // gyroscope data ready interrupt
1053  INTERRUPT_XM_GEN1, // XM interrupt generator 1
1054  INTERRUPT_XM_GEN2 // XM interrupt generator 2
1055  } INTERRUPT_PINS_T;
1056 
1057 
1067  LSM9DS0(int bus=LSM9DS0_I2C_BUS,
1068  bool raw=false,
1069  uint8_t gAddress=LSM9DS0_DEFAULT_GYRO_ADDR,
1070  uint8_t xmAddress=LSM9DS0_DEFAULT_XM_ADDR);
1071 
1075  ~LSM9DS0();
1076 
1082  bool init();
1083 
1088  void update();
1089 
1093  void updateGyroscope();
1094 
1098  void updateAccelerometer();
1099 
1103  void updateMagnetometer();
1104 
1108  void updateTemperature();
1109 
1117  uint8_t readReg(DEVICE_T dev, uint8_t reg);
1118 
1128  void readRegs(DEVICE_T dev, uint8_t reg, uint8_t *buffer, int len);
1129 
1138  bool writeReg(DEVICE_T dev, uint8_t reg, uint8_t val);
1139 
1146  bool setGyroscopePowerDown(bool enable);
1147 
1156  bool setGyroscopeEnableAxes(uint8_t axes);
1157 
1164  bool setGyroscopeODR(G_ODR_T odr);
1165 
1172  bool setGyroscopeScale(G_FS_T scale);
1173 
1180  bool setAccelerometerEnableAxes(uint8_t axes);
1181 
1188  bool setAccelerometerODR(XM_AODR_T odr);
1189 
1196  bool setAccelerometerScale(XM_AFS_T scale);
1197 
1205 
1212  bool setMagnetometerODR(XM_ODR_T odr);
1213 
1220  bool setMagnetometerMode(XM_MD_T mode);
1221 
1230  bool setMagnetometerLPM(bool enable);
1231 
1238  bool setMagnetometerScale(XM_MFS_T scale);
1239 
1248  void getAccelerometer(float *x, float *y, float *z);
1249 
1258  void getGyroscope(float *x, float *y, float *z);
1259 
1268  void getMagnetometer(float *x, float *y, float *z);
1269 
1275  std::vector<float> getAccelerometer();
1276 
1282  std::vector<float> getGyroscope();
1283 
1289  std::vector<float> getMagnetometer();
1290 
1299  float getTemperature();
1300 
1307  bool enableTemperatureSensor(bool enable);
1308 
1314  uint8_t getGyroscopeStatus();
1315 
1321  uint8_t getMagnetometerStatus();
1322 
1328  uint8_t getAccelerometerStatus();
1329 
1335  uint8_t getGyroscopeInterruptConfig();
1336 
1343  bool setGyroscopeInterruptConfig(uint8_t enables);
1344 
1350  uint8_t getGyroscopeInterruptSrc();
1351 
1358 
1365  bool setMagnetometerInterruptControl(uint8_t enables);
1366 
1372  uint8_t getMagnetometerInterruptSrc();
1373 
1379  uint8_t getInterruptGen1();
1380 
1387  bool setInterruptGen1(uint8_t enables);
1388 
1394  uint8_t getInterruptGen1Src();
1395 
1401  uint8_t getInterruptGen2();
1402 
1409  bool setInterruptGen2(uint8_t enables);
1410 
1416  uint8_t getInterruptGen2Src();
1417 
1418 
1431  void installISR(INTERRUPT_PINS_T intr, int gpio, mraa::Edge level,
1432  void (*isr)(void *), void *arg);
1433 
1440  void uninstallISR(INTERRUPT_PINS_T intr);
1441 
1442  protected:
1443  // uncompensated accelerometer and gyroscope values
1444  float m_accelX;
1445  float m_accelY;
1446  float m_accelZ;
1447 
1448  float m_gyroX;
1449  float m_gyroY;
1450  float m_gyroZ;
1451 
1452  float m_magX;
1453  float m_magY;
1454  float m_magZ;
1455 
1456  // uncompensated temperature value
1457  float m_temp;
1458 
1459  // accelerometer and gyro scaling factors, depending on their Full
1460  // Scale settings.
1461  float m_accelScale;
1462  float m_gyroScale;
1463  float m_magScale;
1464 
1465  private:
1466  // OR'd with a register, this enables register autoincrement mode,
1467  // which we need.
1468  static const uint8_t m_autoIncrementMode = 0x80;
1469 
1470  mraa::I2c m_i2cG;
1471  mraa::I2c m_i2cXM;
1472  uint8_t m_gAddr;
1473  uint8_t m_xmAddr;
1474 
1475  // return a reference to a gpio pin pointer depending on intr
1476  mraa::Gpio*& getPin(INTERRUPT_PINS_T intr);
1477 
1478  // possible interrupt pins
1479  mraa::Gpio *m_gpioG_INT;
1480  mraa::Gpio *m_gpioG_DRDY;
1481  mraa::Gpio *m_gpioXM_GEN1;
1482  mraa::Gpio *m_gpioXM_GEN2;
1483  };
1484 }
XM_MD_T
Definition: lsm9ds0.hpp:807
bool setMagnetometerMode(XM_MD_T mode)
Definition: lsm9ds0.cxx:523
INT_CTRL_REG_M_BITS_T
Definition: lsm9ds0.hpp:551
float getTemperature()
Definition: lsm9ds0.cxx:646
void updateTemperature()
Definition: lsm9ds0.cxx:268
INT1_CFG_G_BITS_T
Definition: lsm9ds0.hpp:417
bool setInterruptGen1(uint8_t enables)
Definition: lsm9ds0.cxx:718
CTRL_REG0_XM_BITS_T
Definition: lsm9ds0.hpp:580
FIFO_SRC_REG_G_BITS_T
Definition: lsm9ds0.hpp:399
uint8_t getAccelerometerStatus()
Definition: lsm9ds0.cxx:678
bool setMagnetometerInterruptControl(uint8_t enables)
Definition: lsm9ds0.cxx:703
uint8_t readReg(DEVICE_T dev, uint8_t reg)
Definition: lsm9ds0.cxx:288
INT_SRC_REG_M_BITS_T
Definition: lsm9ds0.hpp:565
CLICK_THS_BITS_T
Definition: lsm9ds0.hpp:994
CLICK_CONFIG_BITS_T
Definition: lsm9ds0.hpp:965
G_HPM_T
Definition: lsm9ds0.hpp:243
bool setMagnetometerODR(XM_ODR_T odr)
Definition: lsm9ds0.cxx:512
ACT_THS_BITS_T
Definition: lsm9ds0.hpp:1028
REG_G_T
Definition: lsm9ds0.hpp:94
XM_AODR_T
Definition: lsm9ds0.hpp:614
XM_ABW_T
Definition: lsm9ds0.hpp:678
CTRL_REG2_G_BITS_T
Definition: lsm9ds0.hpp:201
CTRL_REG4_XM_BITS_T
Definition: lsm9ds0.hpp:702
FM_T
Definition: lsm9ds0.hpp:869
FIFO_SRC_REG_BITS_T
Definition: lsm9ds0.hpp:883
uint8_t getMagnetometerStatus()
Definition: lsm9ds0.cxx:673
void update()
Definition: lsm9ds0.cxx:206
FIFO_CTRL_REG_G_T
Definition: lsm9ds0.hpp:362
uint8_t getInterruptGen2Src()
Definition: lsm9ds0.cxx:738
CTRL_REG3_G_BITS_T
Definition: lsm9ds0.hpp:253
bool setAccelerometerScale(XM_AFS_T scale)
Definition: lsm9ds0.cxx:454
CLICK_SRC_BITS_T
Definition: lsm9ds0.hpp:979
void updateMagnetometer()
Definition: lsm9ds0.cxx:250
bool setGyroscopeODR(G_ODR_T odr)
Definition: lsm9ds0.cxx:377
INT_GEN_X_THS_BITS_T
Definition: lsm9ds0.hpp:931
uint8_t getMagnetometerInterruptControl()
Definition: lsm9ds0.cxx:698
INT_GEN_X_SRC_BITS_T
Definition: lsm9ds0.hpp:916
bool setGyroscopeInterruptConfig(uint8_t enables)
Definition: lsm9ds0.cxx:688
STATUS_REG_G_BITS_T
Definition: lsm9ds0.hpp:347
XM_MFS_T
Definition: lsm9ds0.hpp:776
bool setGyroscopeScale(G_FS_T scale)
Definition: lsm9ds0.cxx:388
bool setMagnetometerResolution(XM_RES_T res)
Definition: lsm9ds0.cxx:501
CLICK_TIME_LIMIT_BITS_T
Definition: lsm9ds0.hpp:1011
G_HPCF_T
Definition: lsm9ds0.hpp:224
API for the LSM9DS0 3-axis Gyroscope, Accelerometer, and Magnetometer.
Definition: lsm9ds0.hpp:80
std::vector< float > getMagnetometer()
Definition: lsm9ds0.cxx:639
uint8_t getGyroscopeInterruptConfig()
Definition: lsm9ds0.cxx:683
bool setGyroscopeEnableAxes(uint8_t axes)
Definition: lsm9ds0.cxx:361
C++ API for the kxtj3 driver.
Definition: a110x.hpp:29
G_ST_T
Definition: lsm9ds0.hpp:290
uint8_t getInterruptGen1Src()
Definition: lsm9ds0.cxx:723
void updateAccelerometer()
Definition: lsm9ds0.cxx:232
uint8_t getGyroscopeStatus()
Definition: lsm9ds0.cxx:668
CTRL_REG4_G_BITS_T
Definition: lsm9ds0.hpp:267
bool setMagnetometerScale(XM_MFS_T scale)
Definition: lsm9ds0.cxx:546
uint8_t getMagnetometerInterruptSrc()
Definition: lsm9ds0.cxx:708
CTRL_REG5_XM_BITS_T
Definition: lsm9ds0.hpp:716
void updateGyroscope()
Definition: lsm9ds0.cxx:214
uint8_t getInterruptGen1()
Definition: lsm9ds0.cxx:713
G_FM_T
Definition: lsm9ds0.hpp:385
CTRL_REG1_XM_BITS_T
Definition: lsm9ds0.hpp:596
bool setMagnetometerLPM(bool enable)
Definition: lsm9ds0.cxx:534
LSM9DS0(int bus=LSM9DS0_I2C_BUS, bool raw=false, uint8_t gAddress=LSM9DS0_DEFAULT_GYRO_ADDR, uint8_t xmAddress=LSM9DS0_DEFAULT_XM_ADDR)
Definition: lsm9ds0.cxx:37
G_INT1OUTSEL_T
Definition: lsm9ds0.hpp:337
uint8_t getInterruptGen2()
Definition: lsm9ds0.cxx:728
STATUS_REG_M_BITS_T
Definition: lsm9ds0.hpp:536
CTRL_REG2_XM_BITS_T
Definition: lsm9ds0.hpp:632
INT_GEN_X_REG_BITS_T
Definition: lsm9ds0.hpp:901
std::vector< float > getAccelerometer()
Definition: lsm9ds0.cxx:625
void readRegs(DEVICE_T dev, uint8_t reg, uint8_t *buffer, int len)
Definition: lsm9ds0.cxx:305
XM_ODR_T
Definition: lsm9ds0.hpp:737
XM_AHPM_T
Definition: lsm9ds0.hpp:817
bool setGyroscopePowerDown(bool enable)
Definition: lsm9ds0.cxx:349
CTRL_REG1_G_BITS_T
Definition: lsm9ds0.hpp:141
bool writeReg(DEVICE_T dev, uint8_t reg, uint8_t val)
Definition: lsm9ds0.cxx:324
CTRL_REG3_XM_BITS_T
Definition: lsm9ds0.hpp:688
INT_GEN_X_DUR_BITS_T
Definition: lsm9ds0.hpp:948
bool setInterruptGen2(uint8_t enables)
Definition: lsm9ds0.cxx:733
REG_XM_T
Definition: lsm9ds0.hpp:452
void installISR(INTERRUPT_PINS_T intr, int gpio, mraa::Edge level, void(*isr)(void *), void *arg)
Definition: lsm9ds0.cxx:744
XM_AST_T
Definition: lsm9ds0.hpp:655
std::vector< float > getGyroscope()
Definition: lsm9ds0.cxx:632
bool setAccelerometerEnableAxes(uint8_t axes)
Definition: lsm9ds0.cxx:427
bool enableTemperatureSensor(bool enable)
Definition: lsm9ds0.cxx:656
XM_RES_T
Definition: lsm9ds0.hpp:751
G_FS_T
Definition: lsm9ds0.hpp:303
G_ODR_T
Definition: lsm9ds0.hpp:177
INT1_SRC_G_BITS_T
Definition: lsm9ds0.hpp:433
bool setAccelerometerODR(XM_AODR_T odr)
Definition: lsm9ds0.cxx:443
CTRL_REG7_XM_BITS_T
Definition: lsm9ds0.hpp:786
CTRL_REG5_G_BITS_T
Definition: lsm9ds0.hpp:313
XM_AFS_T
Definition: lsm9ds0.hpp:665
FIFO_CTRL_REG_T
Definition: lsm9ds0.hpp:846
CTRL_REG6_XM_BITS_T
Definition: lsm9ds0.hpp:762
bool init()
Definition: lsm9ds0.cxx:86
~LSM9DS0()
Definition: lsm9ds0.cxx:78
uint8_t getGyroscopeInterruptSrc()
Definition: lsm9ds0.cxx:693
STATUS_REG_A_BITS_T
Definition: lsm9ds0.hpp:831
void uninstallISR(INTERRUPT_PINS_T intr)
Definition: lsm9ds0.cxx:758