upm  1.6.0
Sensor/Actuator repository for libmraa (v1.9.0)
mma8x5x.hpp
1 /*
2  * Author: Norbert Wesp <nwesp@phytec.de>
3  * Copyright (c) 2017 Phytec Messtechnik GmbH.
4  *
5  * based on: RIOT-driver mma8x5x by Johann Fischer <j.fischer@phytec.de>
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining
8  * a copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sublicense, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be
16  * included in all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  */
26 
27 #pragma once
28 
29 #include <string>
30 #include <mraa/i2c.hpp>
31 #include <stdint.h>
32 #include <stdbool.h>
33 
34 /* Supported devices by this driver */
35 #define MMA8X5X_DEVICE_ID_MMA8652 0x4a
36 #define MMA8X5X_DEVICE_ID_MMA8653 0x5a
37 #define MMA8X5X_DEVICE_ID_MMA8451 0x1a
38 #define MMA8X5X_DEVICE_ID_MMA8452 0x2a
39 #define MMA8X5X_DEVICE_ID_MMA8453 0x3a
40 
41 #define MMA8X5X_NAME_MMA8652 "MMA8652"
42 #define MMA8X5X_NAME_MMA8653 "MMA8653"
43 #define MMA8X5X_NAME_MMA8451 "MMA8451"
44 #define MMA8X5X_NAME_MMA8452 "MMA8452"
45 #define MMA8X5X_NAME_MMA8453 "MMA8453"
46 
47 /* MMA8x5x Fix settings of supported sensors */
48 #define MMA8X5X_I2C_ADDRESS 0x1D
49 #define MMA8X5X_DEVICE_ID_REG 0x0D
50 
51 /* MMA8x5x Register Map */
52 #define MMA8X5X_STATUS 0x00 /* Data or FIFO Status */
53 #define MMA8X5X_OUT_X_MSB 0x01 /* [7:0] are 8 MSBs of X data */
54 #define MMA8X5X_OUT_X_LSB 0x02 /* [7:4] are 4 LSBs of X data */
55 #define MMA8X5X_OUT_Y_MSB 0x03 /* [7:0] are 8 MSBs of Y data */
56 #define MMA8X5X_OUT_Y_LSB 0x04 /* [7:4] are 4 LSBs of Y data */
57 #define MMA8X5X_OUT_Z_MSB 0x05 /* [7:0] are 8 MSBs of Z data */
58 #define MMA8X5X_OUT_Z_LSB 0x06 /* [7:4] are 8 LSBs of Z data */
59 #define MMA8X5X_F_SETUP 0x09 /* FIFO setup */
60 #define MMA8X5X_TRIG_CFG 0x0A /* Map of FIFO data capture events */
61 #define MMA8X5X_SYSMOD 0x0B /* Current System mode */
62 #define MMA8X5X_INT_SOURCE 0x0C /* Interrupt status */
63 #define MMA8X5X_XYZ_DATA_CFG 0x0E /* Dynamic Range Settings */
64 #define MMA8X5X_HP_FILTER_CUTOFF 0x0F /* High-Pass Filter Selection */
65 #define MMA8X5X_PL_STATUS 0x10 /* Landscape/Portrait
66  orientation status */
67 #define MMA8X5X_PL_CFG 0x11 /* Landscape/Portrait configuration */
68 #define MMA8X5X_PL_COUNT 0x12 /* Landscape/Portrait debounce counter */
69 #define MMA8X5X_PL_BF_ZCOMP 0x13 /* Back/Front, Z-Lock Trip threshold */
70 #define MMA8X5X_P_L_THS_REG 0x14 /* Portrait/Landscape
71  Threshold and Hysteresis */
72 #define MMA8X5X_FF_MT_CFG 0x15 /* Freefall/Motion
73  functional block configuration */
74 #define MMA8X5X_FF_MT_SRC 0x16 /* Freefall/Motion
75  event source register */
76 #define MMA8X5X_FF_MT_THS 0x17 /* Freefall/Motion threshold register */
77 #define MMA8X5X_FF_MT_COUNT 0x18 /* Freefall/Motion debounce counter */
78 #define MMA8X5X_TRANSIENT_CFG 0x1D /* Transient
79  functional block configuration */
80 #define MMA8X5X_TRANSIENT_SRC 0x1E /* Transient event status register */
81 #define MMA8X5X_TRANSIENT_THS 0x1F /* Transient event threshold */
82 #define MMA8X5X_TRANSIENT_COUNT 0x20 /* Transient debounce counter */
83 #define MMA8X5X_PULSE_CFG 0x21 /* Pulse enable configuration */
84 #define MMA8X5X_PULSE_SRC 0x22 /* Pulse detection source */
85 #define MMA8X5X_PULSE_THSX 0x23 /* X pulse threshold */
86 #define MMA8X5X_PULSE_THSY 0x24 /* Y pulse threshold */
87 #define MMA8X5X_PULSE_THSZ 0x25 /* Z pulse threshold */
88 #define MMA8X5X_PULSE_TMLT 0x26 /* Time limit for pulse */
89 #define MMA8X5X_PULSE_LTCY 0x27 /* Latency time for 2nd pulse */
90 #define MMA8X5X_PULSE_WIND 0x28 /* Window time for 2nd pulse */
91 #define MMA8X5X_ASLP_COUNT 0x29 /* Counter setting for Auto-SLEEP */
92 #define MMA8X5X_CTRL_REG1 0x2A /* Data rates and modes setting */
93 #define MMA8X5X_CTRL_REG2 0x2B /* Sleep Enable, OS modes, RST, ST */
94 #define MMA8X5X_CTRL_REG3 0x2C /* Wake from Sleep, IPOL, PP_OD */
95 #define MMA8X5X_CTRL_REG4 0x2D /* Interrupt enable register */
96 #define MMA8X5X_CTRL_REG5 0x2E /* Interrupt pin (INT1/INT2) map */
97 #define MMA8X5X_OFF_X 0x2F /* X-axis offset adjust */
98 #define MMA8X5X_OFF_Y 0x30 /* Y-axis offset adjust */
99 #define MMA8X5X_OFF_Z 0x31 /* Z-axis offset adjust */
100 
101 /* MMA8x5x Available sampling rates */
102 #define MMA8X5X_RATE_800HZ (0 << 3) /* 800 Hz Ouput Data Rate in WAKE mode */
103 #define MMA8X5X_RATE_400HZ (1 << 3) /* 400 Hz Ouput Data Rate in WAKE mode */
104 #define MMA8X5X_RATE_200HZ (2 << 3) /* 200 Hz Ouput Data Rate in WAKE mode */
105 #define MMA8X5X_RATE_100HZ (3 << 3) /* 100 Hz Ouput Data Rate in WAKE mode */
106 #define MMA8X5X_RATE_50HZ (4 << 3) /* 50 Hz Ouput Data Rate in WAKE mode */
107 #define MMA8X5X_RATE_1HZ25 (5 << 3) /* 12.5 Hz Ouput Data Rate in WAKE mode */
108 #define MMA8X5X_RATE_6HZ25 (6 << 3) /* 6.25 Hz Ouput Data Rate in WAKE mode */
109 #define MMA8X5X_RATE_1HZ56 (7 << 3) /* 1.56 Hz Ouput Data Rate in WAKE mode */
110 
111 #define MMA8X5X_RATE_DEFAULT MMA8X5X_RATE_200HZ
112 
113 /* MMA8x5x Available range options */
114 #define MMA8X5X_RANGE_2G 0
115 #define MMA8X5X_RANGE_4G 1
116 #define MMA8X5X_RANGE_8G 2
117 
118 #define MMA8X5X_RANGE_DEFAULT MMA8X5X_RANGE_2G
119 
120 /* Named return values */
121 #define MMA8X5X_OK 0 /* everything was fine */
122 #define MMA8X5X_DATA_READY 1 /* new data ready to be read */
123 #define MMA8X5X_NOI2C -1 /* I2C communication failed */
124 #define MMA8X5X_NODEV -2 /* no MMA8X5X device found on the bus */
125 #define MMA8X5X_NODATA -3 /* no data available */
126 
127 /* MMA8x5x Register Bitfields */
128 #define MMA8X5X_STATUS_XDR (1 << 0)
129 #define MMA8X5X_STATUS_YDR (1 << 1)
130 #define MMA8X5X_STATUS_ZDR (1 << 2)
131 #define MMA8X5X_STATUS_ZYXDR (1 << 3)
132 #define MMA8X5X_STATUS_XOW (1 << 4)
133 #define MMA8X5X_STATUS_YOW (1 << 5)
134 #define MMA8X5X_STATUS_ZOW (1 << 6)
135 #define MMA8X5X_STATUS_ZYXOW (1 << 7)
136 
137 #define MMA8X5X_F_STATUS_F_CNT_MASK 0x3F
138 #define MMA8X5X_F_STATUS_F_WMRK_FLAG (1 << 6)
139 #define MMA8X5X_F_STATUS_F_OVF (1 << 7)
140 
141 #define MMA8X5X_F_SETUP_MODE_MASK 0xC0
142 #define MMA8X5X_F_SETUP_MODE_DISABLED 0
143 #define MMA8X5X_F_SETUP_MODE_CIRCULAR 1
144 #define MMA8X5X_F_SETUP_MODE_STOP 2
145 #define MMA8X5X_F_SETUP_MODE_TRIGGER 3
146 #define MMA8X5X_F_SETUP_F_WMRK_MASK 0x3F
147 
148 #define MMA8X5X_TRIG_CFG_FF_MT (1 << 2)
149 #define MMA8X5X_TRIG_CFG_PULSE (1 << 3)
150 #define MMA8X5X_TRIG_CFG_LNDPRT (1 << 4)
151 #define MMA8X5X_TRIG_CFG_TRANS (1 << 5)
152 
153 #define MMA8X5X_SYSMOD_MASK 0x3
154 #define MMA8X5X_SYSMOD_STANDBY 0
155 #define MMA8X5X_SYSMOD_WAKE 1
156 #define MMA8X5X_SYSMOD_SLEEP 2
157 #define MMA8X5X_SYSMOD_FGT_MASK 0x7C
158 #define MMA8X5X_SYSMOD_FGERR (1 << 7)
159 
160 #define MMA8X5X_INT_SOURCE_DRDY (1 << 0)
161 #define MMA8X5X_INT_SOURCE_FF_MT (1 << 2)
162 #define MMA8X5X_INT_SOURCE_PULSE (1 << 3)
163 #define MMA8X5X_INT_SOURCE_LNDPRT (1 << 4)
164 #define MMA8X5X_INT_SOURCE_TRANS (1 << 5)
165 #define MMA8X5X_INT_SOURCE_FIFO (1 << 6)
166 #define MMA8X5X_INT_SOURCE_ASLP (1 << 7)
167 
168 #define MMA8X5X_XYZ_DATA_CFG_FS_MASK 0x3
169 #define MMA8X5X_XYZ_DATA_CFG_HPF_OUT (1 << 4)
170 
171 #define MMA8X5X_HP_FILTER_SEL_MASK 0x03
172 #define MMA8X5X_HP_FILTER_LPF_EN (1 << 4)
173 #define MMA8X5X_HP_FILTER_HPF_BYP (1 << 5)
174 
175 #define MMA8X5X_PL_STATUS_BAFRO (1 << 0)
176 #define MMA8X5X_PL_STATUS_LAPO_MASK 0x6
177 #define MMA8X5X_PL_STATUS_LAPO_P_UP 0
178 #define MMA8X5X_PL_STATUS_LAPO_P_DOWN 1
179 #define MMA8X5X_PL_STATUS_LAPO_L_RIGHT 2
180 #define MMA8X5X_PL_STATUS_LAPO_L_LEFT 3
181 #define MMA8X5X_PL_STATUS_LO (1 << 6)
182 #define MMA8X5X_PL_STATUS_NEWLP (1 << 7)
183 
184 #define MMA8X5X_PL_CFG_PL_EN (1 << 6)
185 #define MMA8X5X_PL_CFG_DBCNTM (1 << 7)
186 
187 #define MMA8X5X_PL_BF_ZCOMP_ZLOCK_MASK 0x07
188 #define MMA8X5X_PL_BF_ZCOMP_BKFR_MASK 0xC0
189 
190 #define MMA8X5X_P_L_HYS_MASK 0x07
191 #define MMA8X5X_P_L_THS_MASK 0xF8
192 
193 #define MMA8X5X_FF_MT_CFG_XEFE (1 << 3)
194 #define MMA8X5X_FF_MT_CFG_YEFE (1 << 4)
195 #define MMA8X5X_FF_MT_CFG_ZEFE (1 << 5)
196 #define MMA8X5X_FF_MT_CFG_OAE (1 << 6)
197 #define MMA8X5X_FF_MT_CFG_ELE (1 << 7)
198 
199 #define MMA8X5X_FF_MT_SRC_XHP (1 << 0)
200 #define MMA8X5X_FF_MT_SRC_XHE (1 << 1)
201 #define MMA8X5X_FF_MT_SRC_YHP (1 << 2)
202 #define MMA8X5X_FF_MT_SRC_YHE (1 << 3)
203 #define MMA8X5X_FF_MT_SRC_ZHP (1 << 4)
204 #define MMA8X5X_FF_MT_SRC_ZHE (1 << 5)
205 #define MMA8X5X_FF_MT_SRC_EA (1 << 7)
206 
207 #define MMA8X5X_FF_MT_THS_MASK 0x7F
208 #define MMA8X5X_FF_MT_THS_DBCNTM (1 << 7)
209 
210 #define MMA8X5X_TRANSIENT_CFG_HPF_BYP (1 << 0)
211 #define MMA8X5X_TRANSIENT_CFG_XTEFE (1 << 1)
212 #define MMA8X5X_TRANSIENT_CFG_YTEFE (1 << 2)
213 #define MMA8X5X_TRANSIENT_CFG_ZTEFE (1 << 3)
214 #define MMA8X5X_TRANSIENT_CFG_ELE (1 << 4)
215 
216 #define MMA8X5X_TRANSIENT_SRC_XTPOL (1 << 0)
217 #define MMA8X5X_TRANSIENT_SRC_XTEVENT (1 << 1)
218 #define MMA8X5X_TRANSIENT_SRC_YTPOL (1 << 2)
219 #define MMA8X5X_TRANSIENT_SRC_YTEVENT (1 << 3)
220 #define MMA8X5X_TRANSIENT_SRC_ZTPOL (1 << 4)
221 #define MMA8X5X_TRANSIENT_SRC_ZTEVENT (1 << 5)
222 #define MMA8X5X_TRANSIENT_SRC_EA (1 << 6)
223 
224 #define MMA8X5X_TRANSIENT_THS_MASK 0x7F
225 #define MMA8X5X_TRANSIENT_THS_DBCNTM (1<< 7)
226 
227 #define MMA8X5X_PULSE_CFG_XSPEFE (1 << 0)
228 #define MMA8X5X_PULSE_CFG_XDPEFE (1 << 1)
229 #define MMA8X5X_PULSE_CFG_YSPEFE (1 << 2)
230 #define MMA8X5X_PULSE_CFG_YDPEFE (1 << 3)
231 #define MMA8X5X_PULSE_CFG_ZSPEFE (1 << 4)
232 #define MMA8X5X_PULSE_CFG_ZDPEFE (1 << 5)
233 #define MMA8X5X_PULSE_CFG_ELE (1 << 6)
234 #define MMA8X5X_PULSE_CFG_DPA (1 << 7)
235 
236 #define MMA8X5X_PULSE_SRC_POLX (1 << 0)
237 #define MMA8X5X_PULSE_SRC_POLY (1 << 1)
238 #define MMA8X5X_PULSE_SRC_POLZ (1 << 2)
239 #define MMA8X5X_PULSE_SRC_DPE (1 << 3)
240 #define MMA8X5X_PULSE_SRC_AXX (1 << 4)
241 #define MMA8X5X_PULSE_SRC_AXY (1 << 5)
242 #define MMA8X5X_PULSE_SRC_AXZ (1 << 6)
243 #define MMA8X5X_PULSE_SRC_EA (1 << 7)
244 
245 #define MMA8X5X_PULSE_THSX_MASK 0x7F
246 #define MMA8X5X_PULSE_THSY_MASK 0x7F
247 #define MMA8X5X_PULSE_THSZ_MASK 0x7F
248 
249 #define MMA8X5X_CTRL_REG1_ACTIVE (1 << 0)
250 #define MMA8X5X_CTRL_REG1_F_READ (1 << 1)
251 #define MMA8X5X_CTRL_REG1_DR_MASK 0x38
252 #define MMA8X5X_CTRL_REG1_DR_SHIFT 3
253 #define MMA8X5X_CTRL_REG1_DR(x) (((uint8_t)(((uint8_t)(x))<<\
254  MMA8X5X_CTRL_REG1_DR_SHIFT))\
255  &MMA8X5X_CTRL_REG1_DR_MASK)
256 #define MMA8X5X_CTRL_REG1_ASR_MASK 0xC0
257 #define MMA8X5X_CTRL_REG1_ASR_50HZ 0
258 #define MMA8X5X_CTRL_REG1_ASR_12HZ5 1
259 #define MMA8X5X_CTRL_REG1_ASR_6HZ25 2
260 #define MMA8X5X_CTRL_REG1_ASR_1HZ56 3
261 
262 #define MMA8X5X_CTRL_REG2_MODS_MASK 0x3
263 #define MMA8X5X_CTRL_REG2_MODS_NORMAL 0
264 #define MMA8X5X_CTRL_REG2_MODS_LNLP 1
265 #define MMA8X5X_CTRL_REG2_MODS_HR 2
266 #define MMA8X5X_CTRL_REG2_MODS_LP 3
267 #define MMA8X5X_CTRL_REG2_SLPE (1 << 2)
268 #define MMA8X5X_CTRL_REG2_SMODS_MASK 0x18
269 #define MMA8X5X_CTRL_REG2_SMODS_NORMAL 0
270 #define MMA8X5X_CTRL_REG2_SMODS_LNLP 1
271 #define MMA8X5X_CTRL_REG2_SMODS_HR 2
272 #define MMA8X5X_CTRL_REG2_SMODS_LP 3
273 #define MMA8X5X_CTRL_REG2_RST (1 << 6)
274 #define MMA8X5X_CTRL_REG2_ST (1 << 7)
275 
276 #define MMA8X5X_CTRL_REG3_PP_OD (1 << 0)
277 #define MMA8X5X_CTRL_REG3_IPOL (1 << 1)
278 #define MMA8X5X_CTRL_REG3_WAKE_FF_MT (1 << 3)
279 #define MMA8X5X_CTRL_REG3_WAKE_PULSE (1 << 4)
280 #define MMA8X5X_CTRL_REG3_WAKE_LNDPRT (1 << 5)
281 #define MMA8X5X_CTRL_REG3_WAKE_TRANS (1 << 6)
282 #define MMA8X5X_CTRL_REG3_FIFO_GATE (1 << 7)
283 
284 #define MMA8X5X_CTRL_REG4_INT_EN_DRDY (1 << 0)
285 #define MMA8X5X_CTRL_REG4_INT_EN_FF_MT (1 << 2)
286 #define MMA8X5X_CTRL_REG4_INT_EN_PULSE (1 << 3)
287 #define MMA8X5X_CTRL_REG4_INT_EN_LNDPRT (1 << 4)
288 #define MMA8X5X_CTRL_REG4_INT_EN_TRANS (1 << 5)
289 #define MMA8X5X_CTRL_REG4_INT_EN_FIFO (1 << 6)
290 #define MMA8X5X_CTRL_REG4_INT_EN_ASLP (1 << 7)
291 
292 #define MMA8X5X_CTRL_REG5_INT_CFG_DRDY (1 << 0)
293 #define MMA8X5X_CTRL_REG5_INT_CFG_FF_MT (1 << 2)
294 #define MMA8X5X_CTRL_REG5_INT_CFG_PULSE (1 << 3)
295 #define MMA8X5X_CTRL_REG5_INT_CFG_LNDPRT (1 << 4)
296 #define MMA8X5X_CTRL_REG5_INT_CFG_TRANS (1 << 5)
297 #define MMA8X5X_CTRL_REG5_INT_CFG_FIFO (1 << 6)
298 #define MMA8X5X_CTRL_REG5_INT_CFG_ASLP (1 << 7)
299 
300 namespace upm {
301 
302 typedef struct {
303  uint8_t type;
304  uint8_t rate;
305  uint8_t range;
306  uint8_t offsetX;
307  uint8_t offsetY;
308  uint8_t offsetZ;
310 
311 typedef struct {
312  int16_t x;
313  int16_t y;
314  int16_t z;
316 
344 class MMA8X5X {
345  public:
354  MMA8X5X (int bus, mma8x5x_params_t* params=NULL,
355  int devAddr=MMA8X5X_I2C_ADDRESS);
356 
366  int setDeviceName(uint8_t type);
367 
377  int setDeviceParams(mma8x5x_params_t* params);
378 
390  int setUserOffset(int8_t x, int8_t y, int8_t z);
391 
398  int setActive(void);
399 
406  int setStandby(void);
407 
414  int isReady(void);
415 
422  int sampleData(void);
423 
431  int16_t getX(int bSampleData = 0);
432 
440  int16_t getY(int bSampleData = 0);
441 
449  int16_t getZ(int bSampleData = 0);
450 
459  int getData(mma8x5x_data_t* data, int bSampleData = 0);
460 
461  private:
462 
463  std::string m_name;
464 
465  int m_controlAddr;
466  int m_bus;
467  mraa::I2c m_i2ControlCtx;
468 
469  mma8x5x_params_t s_params[1];
470  mma8x5x_data_t s_data[1];
471 };
472 
473 }
int setDeviceName(uint8_t type)
Definition: mma8x5x.cpp:109
int sampleData(void)
Definition: mma8x5x.cpp:274
int16_t getX(int bSampleData=0)
Definition: mma8x5x.cpp:293
MMA8X5X(int bus, mma8x5x_params_t *params=NULL, int devAddr=MMA8X5X_I2C_ADDRESS)
Definition: mma8x5x.cpp:40
int isReady(void)
Definition: mma8x5x.cpp:260
int setActive(void)
Definition: mma8x5x.cpp:226
int setUserOffset(int8_t x, int8_t y, int8_t z)
Definition: mma8x5x.cpp:201
Definition: mma8x5x.hpp:302
int16_t getZ(int bSampleData=0)
Definition: mma8x5x.cpp:319
Definition: mma8x5x.hpp:311
C++ API for the kxtj3 driver.
Definition: a110x.hpp:29
int getData(mma8x5x_data_t *data, int bSampleData=0)
Definition: mma8x5x.cpp:332
int setStandby(void)
Definition: mma8x5x.cpp:243
int16_t getY(int bSampleData=0)
Definition: mma8x5x.cpp:306
API for the MMA8X5X Three-Axis Accelerometer.
Definition: mma8x5x.hpp:344
int setDeviceParams(mma8x5x_params_t *params)
Definition: mma8x5x.cpp:148