# This file was automatically generated by SWIG (http://www.swig.org).
# Version 3.0.8
#
# Do not make changes to this file unless you know what you are doing--modify
# the SWIG interface file instead.
from sys import version_info
if version_info >= (2, 6, 0):
def swig_import_helper():
from os.path import dirname
import imp
fp = None
try:
fp, pathname, description = imp.find_module('_pyupm_h3lis331dl', [dirname(__file__)])
except ImportError:
import _pyupm_h3lis331dl
return _pyupm_h3lis331dl
if fp is not None:
try:
_mod = imp.load_module('_pyupm_h3lis331dl', fp, pathname, description)
finally:
fp.close()
return _mod
_pyupm_h3lis331dl = swig_import_helper()
del swig_import_helper
else:
import _pyupm_h3lis331dl
del version_info
try:
_swig_property = property
except NameError:
pass # Python < 2.2 doesn't have 'property'.
def _swig_setattr_nondynamic(self, class_type, name, value, static=1):
if (name == "thisown"):
return self.this.own(value)
if (name == "this"):
if type(value).__name__ == 'SwigPyObject':
self.__dict__[name] = value
return
method = class_type.__swig_setmethods__.get(name, None)
if method:
return method(self, value)
if (not static):
if _newclass:
object.__setattr__(self, name, value)
else:
self.__dict__[name] = value
else:
raise AttributeError("You cannot add attributes to %s" % self)
def _swig_setattr(self, class_type, name, value):
return _swig_setattr_nondynamic(self, class_type, name, value, 0)
def _swig_getattr_nondynamic(self, class_type, name, static=1):
if (name == "thisown"):
return self.this.own()
method = class_type.__swig_getmethods__.get(name, None)
if method:
return method(self)
if (not static):
return object.__getattr__(self, name)
else:
raise AttributeError(name)
def _swig_getattr(self, class_type, name):
return _swig_getattr_nondynamic(self, class_type, name, 0)
def _swig_repr(self):
try:
strthis = "proxy of " + self.this.__repr__()
except Exception:
strthis = ""
return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,)
try:
_object = object
_newclass = 1
except AttributeError:
class _object:
pass
_newclass = 0
def getVersion():
return _pyupm_h3lis331dl.getVersion()
getVersion = _pyupm_h3lis331dl.getVersion
def new_intp():
return _pyupm_h3lis331dl.new_intp()
new_intp = _pyupm_h3lis331dl.new_intp
def copy_intp(value):
return _pyupm_h3lis331dl.copy_intp(value)
copy_intp = _pyupm_h3lis331dl.copy_intp
def delete_intp(obj):
return _pyupm_h3lis331dl.delete_intp(obj)
delete_intp = _pyupm_h3lis331dl.delete_intp
def intp_assign(obj, value):
return _pyupm_h3lis331dl.intp_assign(obj, value)
intp_assign = _pyupm_h3lis331dl.intp_assign
def intp_value(obj):
return _pyupm_h3lis331dl.intp_value(obj)
intp_value = _pyupm_h3lis331dl.intp_value
def new_floatp():
return _pyupm_h3lis331dl.new_floatp()
new_floatp = _pyupm_h3lis331dl.new_floatp
def copy_floatp(value):
return _pyupm_h3lis331dl.copy_floatp(value)
copy_floatp = _pyupm_h3lis331dl.copy_floatp
def delete_floatp(obj):
return _pyupm_h3lis331dl.delete_floatp(obj)
delete_floatp = _pyupm_h3lis331dl.delete_floatp
def floatp_assign(obj, value):
return _pyupm_h3lis331dl.floatp_assign(obj, value)
floatp_assign = _pyupm_h3lis331dl.floatp_assign
def floatp_value(obj):
return _pyupm_h3lis331dl.floatp_value(obj)
floatp_value = _pyupm_h3lis331dl.floatp_value
_pyupm_h3lis331dl.H3LIS331DL_I2C_BUS_swigconstant(_pyupm_h3lis331dl)
H3LIS331DL_I2C_BUS = _pyupm_h3lis331dl.H3LIS331DL_I2C_BUS
_pyupm_h3lis331dl.H3LIS331DL_DEFAULT_I2C_ADDR_swigconstant(_pyupm_h3lis331dl)
H3LIS331DL_DEFAULT_I2C_ADDR = _pyupm_h3lis331dl.H3LIS331DL_DEFAULT_I2C_ADDR
[docs]class H3LIS331DL(_object):
"""
API for the H3LIS331DL-based Grove 3-Axis Digital Accelerometer (400g)
ID: h3lis331dl
Name: I2C 3-axis Digital Accelerometer (400g)
Other Names: Grove 3-Axis Digital Accelerometer (400g)
Category: accelerometer
Manufacturer: seeed stmicro
Link:http://www.seeedstudio.com/depot/Grove-3Axis-Digital-
Accelerometer400g-p-1897.html
Connection: i2c This is a high-performance, high-range accelerometer
for extreme applications.
C++ includes: h3lis331dl.hpp
"""
__swig_setmethods__ = {}
__setattr__ = lambda self, name, value: _swig_setattr(self, H3LIS331DL, name, value)
__swig_getmethods__ = {}
__getattr__ = lambda self, name: _swig_getattr(self, H3LIS331DL, name)
__repr__ = _swig_repr
REG_WHOAMI = _pyupm_h3lis331dl.H3LIS331DL_REG_WHOAMI
REG_REG1 = _pyupm_h3lis331dl.H3LIS331DL_REG_REG1
REG_REG2 = _pyupm_h3lis331dl.H3LIS331DL_REG_REG2
REG_REG3 = _pyupm_h3lis331dl.H3LIS331DL_REG_REG3
REG_REG4 = _pyupm_h3lis331dl.H3LIS331DL_REG_REG4
REG_REG5 = _pyupm_h3lis331dl.H3LIS331DL_REG_REG5
REG_HP_FILTER_RESET = _pyupm_h3lis331dl.H3LIS331DL_REG_HP_FILTER_RESET
REG_REFERENCE = _pyupm_h3lis331dl.H3LIS331DL_REG_REFERENCE
REG_STATUS = _pyupm_h3lis331dl.H3LIS331DL_REG_STATUS
REG_OUT_X_L = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_X_L
REG_OUT_X_H = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_X_H
REG_OUT_Y_L = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_Y_L
REG_OUT_Y_H = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_Y_H
REG_OUT_Z_L = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_Z_L
REG_OUT_Z_H = _pyupm_h3lis331dl.H3LIS331DL_REG_OUT_Z_H
REG_INT1_CFG = _pyupm_h3lis331dl.H3LIS331DL_REG_INT1_CFG
REG_INT1_SRC = _pyupm_h3lis331dl.H3LIS331DL_REG_INT1_SRC
REG_INT1_THS = _pyupm_h3lis331dl.H3LIS331DL_REG_INT1_THS
REG_INT1_DUR = _pyupm_h3lis331dl.H3LIS331DL_REG_INT1_DUR
REG_INT2_CFG = _pyupm_h3lis331dl.H3LIS331DL_REG_INT2_CFG
REG_INT2_SRC = _pyupm_h3lis331dl.H3LIS331DL_REG_INT2_SRC
REG_INT2_THS = _pyupm_h3lis331dl.H3LIS331DL_REG_INT2_THS
REG_INT2_DUR = _pyupm_h3lis331dl.H3LIS331DL_REG_INT2_DUR
REG1_XEN = _pyupm_h3lis331dl.H3LIS331DL_REG1_XEN
REG1_YEN = _pyupm_h3lis331dl.H3LIS331DL_REG1_YEN
REG1_ZEN = _pyupm_h3lis331dl.H3LIS331DL_REG1_ZEN
REG1_DR0 = _pyupm_h3lis331dl.H3LIS331DL_REG1_DR0
REG1_DR1 = _pyupm_h3lis331dl.H3LIS331DL_REG1_DR1
REG1_DR_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG1_DR_SHIFT
REG1_PM0 = _pyupm_h3lis331dl.H3LIS331DL_REG1_PM0
REG1_PM1 = _pyupm_h3lis331dl.H3LIS331DL_REG1_PM1
REG1_PM2 = _pyupm_h3lis331dl.H3LIS331DL_REG1_PM2
REG1_PM_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG1_PM_SHIFT
DR_50_37 = _pyupm_h3lis331dl.H3LIS331DL_DR_50_37
DR_100_74 = _pyupm_h3lis331dl.H3LIS331DL_DR_100_74
DR_400_292 = _pyupm_h3lis331dl.H3LIS331DL_DR_400_292
DR_1000_780 = _pyupm_h3lis331dl.H3LIS331DL_DR_1000_780
PM_POWERDWN = _pyupm_h3lis331dl.H3LIS331DL_PM_POWERDWN
PM_NORMAL = _pyupm_h3lis331dl.H3LIS331DL_PM_NORMAL
PM_LP05 = _pyupm_h3lis331dl.H3LIS331DL_PM_LP05
PM_LP1 = _pyupm_h3lis331dl.H3LIS331DL_PM_LP1
PM_LP2 = _pyupm_h3lis331dl.H3LIS331DL_PM_LP2
PM_LP5 = _pyupm_h3lis331dl.H3LIS331DL_PM_LP5
PM_LP10 = _pyupm_h3lis331dl.H3LIS331DL_PM_LP10
REG2_HPCF0 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPCF0
REG2_HPCF1 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPCF1
REG2_HPCF_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPCF_SHIFT
REG2_HPEN1 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPEN1
REG2_HPEN2 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPEN2
REG2_FDS = _pyupm_h3lis331dl.H3LIS331DL_REG2_FDS
REG2_HPM0 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPM0
REG2_HPM1 = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPM1
REG2_HPM_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG2_HPM_SHIFT
REG2_BOOT = _pyupm_h3lis331dl.H3LIS331DL_REG2_BOOT
HPCF_8 = _pyupm_h3lis331dl.H3LIS331DL_HPCF_8
HPCF_16 = _pyupm_h3lis331dl.H3LIS331DL_HPCF_16
HPCF_32 = _pyupm_h3lis331dl.H3LIS331DL_HPCF_32
HPCF_64 = _pyupm_h3lis331dl.H3LIS331DL_HPCF_64
HPM_NORMAL0 = _pyupm_h3lis331dl.H3LIS331DL_HPM_NORMAL0
HPM_REF = _pyupm_h3lis331dl.H3LIS331DL_HPM_REF
HPM_NORMAL1 = _pyupm_h3lis331dl.H3LIS331DL_HPM_NORMAL1
REG3_I1_CFG0 = _pyupm_h3lis331dl.H3LIS331DL_REG3_I1_CFG0
REG3_I1_CFG1 = _pyupm_h3lis331dl.H3LIS331DL_REG3_I1_CFG1
REG3_I1_CFG_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG3_I1_CFG_SHIFT
REG3_LIR1 = _pyupm_h3lis331dl.H3LIS331DL_REG3_LIR1
REG3_I2_CFG0 = _pyupm_h3lis331dl.H3LIS331DL_REG3_I2_CFG0
REG3_I2_CFG1 = _pyupm_h3lis331dl.H3LIS331DL_REG3_I2_CFG1
REG3_I2_CFG_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG3_I2_CFG_SHIFT
REG3_LIR2 = _pyupm_h3lis331dl.H3LIS331DL_REG3_LIR2
REG3_PP_OD = _pyupm_h3lis331dl.H3LIS331DL_REG3_PP_OD
REG3_IHL = _pyupm_h3lis331dl.H3LIS331DL_REG3_IHL
I_SRC = _pyupm_h3lis331dl.H3LIS331DL_I_SRC
I_OR = _pyupm_h3lis331dl.H3LIS331DL_I_OR
I_DR = _pyupm_h3lis331dl.H3LIS331DL_I_DR
I_BOOTING = _pyupm_h3lis331dl.H3LIS331DL_I_BOOTING
REG4_SIM = _pyupm_h3lis331dl.H3LIS331DL_REG4_SIM
REG4_FS0 = _pyupm_h3lis331dl.H3LIS331DL_REG4_FS0
REG4_FS1 = _pyupm_h3lis331dl.H3LIS331DL_REG4_FS1
REG4_FS_SHIFT = _pyupm_h3lis331dl.H3LIS331DL_REG4_FS_SHIFT
REG4_BLE = _pyupm_h3lis331dl.H3LIS331DL_REG4_BLE
REG4_BDU = _pyupm_h3lis331dl.H3LIS331DL_REG4_BDU
FS_100 = _pyupm_h3lis331dl.H3LIS331DL_FS_100
FS_200 = _pyupm_h3lis331dl.H3LIS331DL_FS_200
FS_400 = _pyupm_h3lis331dl.H3LIS331DL_FS_400
REG5_TURNON0 = _pyupm_h3lis331dl.H3LIS331DL_REG5_TURNON0
REG5_TURNON1 = _pyupm_h3lis331dl.H3LIS331DL_REG5_TURNON1
STATUS_XDA = _pyupm_h3lis331dl.H3LIS331DL_STATUS_XDA
STATUS_YDA = _pyupm_h3lis331dl.H3LIS331DL_STATUS_YDA
STATUS_ZDA = _pyupm_h3lis331dl.H3LIS331DL_STATUS_ZDA
STATUS_ZYXDA = _pyupm_h3lis331dl.H3LIS331DL_STATUS_ZYXDA
STATUS_XOR = _pyupm_h3lis331dl.H3LIS331DL_STATUS_XOR
STATUS_YOR = _pyupm_h3lis331dl.H3LIS331DL_STATUS_YOR
STATUS_ZOR = _pyupm_h3lis331dl.H3LIS331DL_STATUS_ZOR
STATUS_ZYXOR = _pyupm_h3lis331dl.H3LIS331DL_STATUS_ZYXOR
INT_CFG_XLIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_XLIE
INT_CFG_XHIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_XHIE
INT_CFG_YLIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_YLIE
INT_CFG_YHIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_YHIE
INT_CFG_ZLIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_ZLIE
INT_CFG_ZHIE = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_ZHIE
INT_CFG_AOI = _pyupm_h3lis331dl.H3LIS331DL_INT_CFG_AOI
INT_SRC_XL = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_XL
INT_SRC_XH = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_XH
INT_SRC_YL = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_YL
INT_SRC_YH = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_YH
INT_SRC_ZL = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_ZL
INT_SRC_ZH = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_ZH
INT_SRC_IA = _pyupm_h3lis331dl.H3LIS331DL_INT_SRC_IA
def __init__(self, bus, address=0x18):
"""
H3LIS331DL(int
bus, uint8_t address=H3LIS331DL_DEFAULT_I2C_ADDR)
H3LIS331DL constructor
Parameters:
-----------
bus: I2C bus to use
address: Address for this device
"""
this = _pyupm_h3lis331dl.new_H3LIS331DL(bus, address)
try:
self.this.append(this)
except Exception:
self.this = this
__swig_destroy__ = _pyupm_h3lis331dl.delete_H3LIS331DL
__del__ = lambda self: None
[docs] def init(self, *args):
"""
bool init(DR_BITS_T
odr=DR_50_37, PM_BITS_T pm=PM_NORMAL, FS_BITS_T fs=FS_100)
Sets up initial values and starts operation
Parameters:
-----------
odr: Data rate: one of the DR_BITS_T values
pm: Power mode: one of the PM_BITS_T values
fs: FullScale: one of the FS_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_init(self, *args)
[docs] def getChipID(self):
"""
uint8_t
getChipID()
Reads and returns the chip ID (WHO_AM_I register)
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_getChipID(self)
[docs] def setDataRate(self, odr):
"""
bool
setDataRate(DR_BITS_T odr)
Sets the output data rate
Parameters:
-----------
odr: One of the DR_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setDataRate(self, odr)
[docs] def setPowerMode(self, pm):
"""
bool
setPowerMode(PM_BITS_T pm)
Sets the power mode
Parameters:
-----------
pm: One of the PM_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setPowerMode(self, pm)
[docs] def enableAxis(self, axisEnable):
"""
bool
enableAxis(uint8_t axisEnable)
Enables one or more of the 3 axes. The argument is a bitmask composed
of REG1_XEN, REG1_YEN, and/or REG1_ZEN corresponding to the axes you
want enabled.
Parameters:
-----------
axisEnable: Bitmask of axes to enable (REG1_XEN | REG1_YEN |
REG1_ZEN)
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableAxis(self, axisEnable)
[docs] def setFullScale(self, fs):
"""
bool
setFullScale(FS_BITS_T fs)
Sets the scaling factor to 100g, 200g, or 400g
Parameters:
-----------
fs: One of the FS_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setFullScale(self, fs)
[docs] def setHPCF(self, val):
"""
bool
setHPCF(HPCF_BITS_T val)
Sets a high-pass cutoff filter
Parameters:
-----------
val: One of the HPCF_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setHPCF(self, val)
[docs] def setHPM(self, val):
"""
bool
setHPM(HPM_BITS_T val)
Sets a high-pass filter mode
Parameters:
-----------
val: One of the HPM_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setHPM(self, val)
[docs] def boot(self):
"""
bool boot()
Boots the device. Booting the device causes internal flash calibration
values to be reloaded into the visible registers in case they have
been corrupted. This function returns when the booting is complete.
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_boot(self)
[docs] def enableHPF1(self, enable):
"""
bool
enableHPF1(bool enable)
Enables a high-pass filter for interrupt 1 source
Parameters:
-----------
enable: True to enable the filter, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableHPF1(self, enable)
[docs] def enableHPF2(self, enable):
"""
bool
enableHPF2(bool enable)
Enables a high-pass filter for interrupt 2 source
Parameters:
-----------
enable: True to enable the filter, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableHPF2(self, enable)
[docs] def enableFDS(self, enable):
"""
bool
enableFDS(bool enable)
Enables filtered data selection
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableFDS(self, enable)
[docs] def setInterruptActiveLow(self, enable):
"""
bool
setInterruptActiveLow(bool enable)
Sets interrupts to be active low instead of high
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterruptActiveLow(self, enable)
[docs] def setInterruptOpenDrain(self, enable):
"""
bool
setInterruptOpenDrain(bool enable)
Sets an interrupt output mode to open drain rather than push/pull
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterruptOpenDrain(self, enable)
[docs] def setInterrupt1Latch(self, enable):
"""
bool
setInterrupt1Latch(bool enable)
Enables interrupt 1 latch
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1Latch(self, enable)
[docs] def setInterrupt2Latch(self, enable):
"""
bool
setInterrupt2Latch(bool enable)
Enables interrupt 2 latch
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2Latch(self, enable)
[docs] def setInterrupt1PadConfig(self, val):
"""
bool
setInterrupt1PadConfig(I_CFG_BITS_T val)
Sets the interrupt 1 pad configuration
Parameters:
-----------
val: One fo the I_CFG_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1PadConfig(self, val)
[docs] def setInterrupt2PadConfig(self, val):
"""
bool
setInterrupt2PadConfig(I_CFG_BITS_T val)
Sets the interrupt 2 pad configuration
Parameters:
-----------
val: One fo the I_CFG_BITS_T values
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2PadConfig(self, val)
[docs] def enableBDU(self, enable):
"""
bool
enableBDU(bool enable)
Enables block data update. When enabled, low/high output registers are
not updated until both low and high values have been read.
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableBDU(self, enable)
[docs] def enableBLE(self, enable):
"""
bool
enableBLE(bool enable)
Enables big-endian output for 16b reads
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableBLE(self, enable)
[docs] def enableSleepToWake(self, enable):
"""
bool
enableSleepToWake(bool enable)
Enables sleep-to-wake functionality
Parameters:
-----------
enable: True to enable, false otherwise
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_enableSleepToWake(self, enable)
[docs] def getStatus(self):
"""
uint8_t
getStatus()
Returns the contents of the REG_STATUS register
Contents of the REG_STATUS register
"""
return _pyupm_h3lis331dl.H3LIS331DL_getStatus(self)
[docs] def setInterrupt1Config(self, val):
"""
bool
setInterrupt1Config(uint8_t val)
Sets up the interrupt 1 config register
Parameters:
-----------
val: Bitmask of desired INT_CFG_BITS_T bits
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1Config(self, val)
[docs] def setInterrupt2Config(self, val):
"""
bool
setInterrupt2Config(uint8_t val)
Sets up the interrupt 2 config register
Parameters:
-----------
val: Bitmask of desired INT_CFG_BITS_T bits
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2Config(self, val)
[docs] def setInterrupt1Source(self, val):
"""
bool
setInterrupt1Source(uint8_t val)
Sets up the interrupt 1 source register
Parameters:
-----------
val: Bitmask of desired INT_SRC_BITS_T bits
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1Source(self, val)
[docs] def setInterrupt2Source(self, val):
"""
bool
setInterrupt2Source(uint8_t val)
Sets up the interrupt 2 source register
Parameters:
-----------
val: Bitmask of desired INT_SRC_BITS_T bits
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2Source(self, val)
[docs] def setInterrupt1Threshold(self, val):
"""
bool
setInterrupt1Threshold(uint8_t val)
Sets up the interrupt 1 threshold register
Parameters:
-----------
val: Threshold to set
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1Threshold(self, val)
[docs] def setInterrupt2Threshold(self, val):
"""
bool
setInterrupt2Threshold(uint8_t val)
Sets up the interrupt 2 threshold register
Parameters:
-----------
val: Threshold to set
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2Threshold(self, val)
[docs] def setInterrupt1Duration(self, val):
"""
bool
setInterrupt1Duration(uint8_t val)
Sets up the interrupt 1 duration register
Parameters:
-----------
val: Duration to set
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt1Duration(self, val)
[docs] def setInterrupt2Duration(self, val):
"""
bool
setInterrupt2Duration(uint8_t val)
Sets up the interrupt 2 duration register
Parameters:
-----------
val: Duration to set
True if successful
"""
return _pyupm_h3lis331dl.H3LIS331DL_setInterrupt2Duration(self, val)
[docs] def update(self):
"""
void update()
Reads the sensor and stores current values internally
"""
return _pyupm_h3lis331dl.H3LIS331DL_update(self)
[docs] def setAdjustmentOffsets(self, adjX, adjY, adjZ):
"""
void
setAdjustmentOffsets(int adjX, int adjY, int adjZ)
Sets adjustment offsets for each of the axes. This can be used for
calibration. The values supplied here are subtracted from the axis
data read from the device.
Parameters:
-----------
adjX: Amount by which to correct the X-axis measurement
adjY: Amount by which to correct the Y-axis measurement
adjZ: Amount by which to correct the Z-axis measurement
"""
return _pyupm_h3lis331dl.H3LIS331DL_setAdjustmentOffsets(self, adjX, adjY, adjZ)
[docs] def getAcceleration(self, *args):
"""
std::vector<
float > getAcceleration()
Gets acceleration values for each of the axes
std::vector containing X, Y, Z acceleration values
"""
return _pyupm_h3lis331dl.H3LIS331DL_getAcceleration(self, *args)
[docs] def getRawXYZ(self, *args):
"""
std::vector< int >
getRawXYZ()
Gets raw axis values
std::vector containing X, Y, Z raw values
"""
return _pyupm_h3lis331dl.H3LIS331DL_getRawXYZ(self, *args)
[docs] def getXYZ(self, *args):
"""
std::vector< int >
getXYZ()
Gets adjusted axis values
std::vector containing X, Y, Z adjusted axis values
"""
return _pyupm_h3lis331dl.H3LIS331DL_getXYZ(self, *args)
[docs] def i2cContext(self):
"""
mraa::I2c&
i2cContext()
Provides public access to the MRAA I2C context of the class for direct
user access
Reference to the class I2C context
"""
return _pyupm_h3lis331dl.H3LIS331DL_i2cContext(self)
H3LIS331DL_swigregister = _pyupm_h3lis331dl.H3LIS331DL_swigregister
H3LIS331DL_swigregister(H3LIS331DL)
# This file is compatible with both classic and new-style classes.