27 #include <mraa/i2c.hpp>
28 #include <mraa/spi.hpp>
29 #include <mraa/gpio.hpp>
31 #define BMA250E_I2C_BUS 0
32 #define BMA250E_SPI_BUS 0
33 #define BMA250E_DEFAULT_ADDR 0x18
75 static const uint8_t BMA250E_RESET_BYTE = 0xb6;
85 typedef enum : uint8_t {
90 REG_ACCD_X_LSB = 0x02,
91 REG_ACCD_X_MSB = 0x03,
92 REG_ACCD_Y_LSB = 0x04,
93 REG_ACCD_Y_MSB = 0x05,
94 REG_ACCD_Z_LSB = 0x06,
95 REG_ACCD_Z_MSB = 0x07,
99 REG_INT_STATUS_0 = 0x09,
100 REG_INT_STATUS_1 = 0x0a,
101 REG_INT_STATUS_2 = 0x0b,
102 REG_INT_STATUS_3 = 0x0c,
106 REG_FIFO_STATUS = 0x0e,
108 REG_PMU_RANGE = 0x0f,
111 REG_PMU_LOW_POWER = 0x12,
115 REG_SOFTRESET = 0x14,
123 REG_INT_MAP_0 = 0x19,
124 REG_INT_MAP_1 = 0x1a,
125 REG_INT_MAP_2 = 0x1b,
133 REG_INT_OUT_CTRL = 0x20,
134 REG_INT_RST_LATCH = 0x21,
151 REG_FIFO_CONFIG_0 = 0x30,
155 REG_PMU_SELFTEST = 0x32,
157 REG_TRIM_NVM_CTRL = 0x33,
164 REG_OFC_SETTING = 0x37,
166 REG_OFC_OFFSET_X = 0x38,
167 REG_OFC_OFFSET_Y = 0x39,
168 REG_OFC_OFFSET_Z = 0x3a,
175 REG_FIFO_CONFIG_1 = 0x3e,
185 ACCD10_LSB_NEW_DATA = 0x01,
191 _ACCD10_LSB_MASK = 3,
192 _ACCD10_LSB_SHIFT = 6
200 ACCD12_LSB_NEW_DATA = 0x01,
208 _ACCD12_LSB_MASK = 15,
209 _ACCD12_LSB_SHIFT = 4
216 INT_STATUS_0_LOW = 0x01,
217 INT_STATUS_0_HIGH = 0x02,
218 INT_STATUS_0_SLOPE = 0x04,
219 INT_STATUS_0_SLO_NOT_MOT = 0x08,
220 INT_STATUS_0_D_TAP = 0x10,
221 INT_STATUS_0_S_TAP = 0x20,
222 INT_STATUS_0_ORIENT = 0x40,
223 INT_STATUS_0_FLAT = 0x80
230 _INT_STATUS_1_RESERVED_BITS = 0x0f | 0x10,
232 INT_STATUS_1_FIFO_FULL = 0x20,
233 INT_STATUS_1_FIFO_WM = 0x40,
234 INT_STATUS_1_DATA = 0x80
241 INT_STATUS_2_SLOPE_FIRST_X = 0x01,
242 INT_STATUS_2_SLOPE_FIRST_Y = 0x02,
243 INT_STATUS_2_SLOPE_FIRST_Z = 0x04,
244 INT_STATUS_2_SLOPE_SIGN = 0x08,
245 INT_STATUS_2_TAP_FIRST_X = 0x10,
246 INT_STATUS_2_TAP_FIRST_Y = 0x20,
247 INT_STATUS_2_TAP_FIRST_Z = 0x40,
248 INT_STATUS_2_TAP_SIGN = 0x80
255 INT_STATUS_3_HIGH_FIRST_X = 0x01,
256 INT_STATUS_3_HIGH_FIRST_Y = 0x02,
257 INT_STATUS_3_HIGH_FIRST_Z = 0x04,
258 INT_STATUS_3_HIGH_SIGN = 0x08,
260 INT_STATUS_3_ORIENT0 = 0x10,
261 INT_STATUS_3_ORIENT1 = 0x20,
262 INT_STATUS_3_ORIENT2 = 0x40,
263 _INT_STATUS_3_ORIENT_MASK = 7,
264 _INT_STATUS_3_ORIENT_SHIFT = 4,
266 INT_STATUS_3_FLAT = 0x80
273 ORIENT_POTRAIT_UPRIGHT = 0,
274 ORIENT_POTRAIT_UPSIDE_DOWN = 1,
275 ORIENT_LANDSCAPE_LEFT = 2,
276 ORIENT_LANDSCAPE_RIGHT = 3,
283 FIFO_STATUS_FRAME_COUNTER0 = 0x01,
284 FIFO_STATUS_FRAME_COUNTER1 = 0x02,
285 FIFO_STATUS_FRAME_COUNTER2 = 0x04,
286 FIFO_STATUS_FRAME_COUNTER3 = 0x08,
287 FIFO_STATUS_FRAME_COUNTER4 = 0x10,
288 FIFO_STATUS_FRAME_COUNTER5 = 0x20,
289 FIFO_STATUS_FRAME_COUNTER6 = 0x40,
290 _FIFO_STATUS_FRAME_COUNTER_MASK = 127,
291 _FIFO_STATUS_FRAME_COUNTER_SHIFT = 0,
293 FIFO_STATUS_FIFO_OVERRUN = 0x80
304 _PMU_RANGE_MASK = 15,
354 _PMU_LPW_RESERVED_MASK = 0x01,
356 PMU_LPW_SLEEP_DUR0 = 0x02,
357 PMU_LPW_SLEEP_DUR1 = 0x04,
358 PMU_LPW_SLEEP_DUR2 = 0x08,
359 PMU_LPW_SLEEP_DUR3 = 0x10,
360 _PMU_LPW_SLEEP_MASK = 15,
361 _PMU_LPW_SLEEP_SHIFT = 1,
367 PMU_LPW_POWER_MODE0 = 0x20,
368 PMU_LPW_POWER_MODE1 = 0x40,
369 PMU_LPW_POWER_MODE2 = 0x80,
370 _PMU_LPW_POWER_MODE_MASK = 7,
371 _PMU_LPW_POWER_MODE_SHIFT = 5
395 POWER_MODE_NORMAL = 0,
396 POWER_MODE_DEEP_SUSPEND = 1,
397 POWER_MODE_LOW_POWER = 2,
398 POWER_MODE_SUSPEND = 4
405 _LOW_POWER_RESERVED_BITS = 0x0f | 0x10 | 0x80,
408 LOW_POWER_SLEEPTIMER_MODE = 0x20,
409 LOW_POWER_LOWPOWER_MODE = 0x40
417 _ACC_HBW_RESERVED_BITS = 0x0f | 0x10 | 0x20,
420 ACC_HBW_SHADOW_DIS = 0x40,
421 ACC_HBW_DATA_HIGH_BW = 0x80
428 _INT_EN_0_RESERVED_BITS = 0x08,
430 INT_EN_0_SLOPE_EN_X = 0x01,
431 INT_EN_0_SLOPE_EN_Y = 0x02,
432 INT_EN_0_SLOPE_EN_Z = 0x04,
436 INT_EN_0_D_TAP_EN = 0x10,
437 INT_EN_0_S_TAP_EN = 0x20,
438 INT_EN_0_ORIENT_EN = 0x40,
439 INT_EN_0_FLAT_EN = 0x80
446 _INT_EN_1_RESERVED_BITS = 0x80,
448 INT_EN_1_HIGH_EN_X = 0x01,
449 INT_EN_1_HIGH_EN_Y = 0x02,
450 INT_EN_1_HIGH_EN_Z = 0x04,
451 INT_EN_1_LOW_EN = 0x08,
452 INT_EN_1_DATA_EN = 0x10,
453 INT_EN_1_INT_FFULL_EN = 0x20,
454 INT_EN_1_INT_FWM_EN = 0x40
463 _INT_EN_2_RESERVED_BITS = 0xf0,
465 INT_EN_2_SLO_NO_MOT_EN_X = 0x01,
466 INT_EN_2_SLO_NO_MOT_EN_Y = 0x02,
467 INT_EN_2_SLO_NO_MOT_EN_Z = 0x04,
468 INT_EN_2_SLO_NO_MOT_SEL = 0x08
477 INT_MAP_0_INT1_LOW = 0x01,
478 INT_MAP_0_INT1_HIGH = 0x02,
479 INT_MAP_0_INT1_SLOPE = 0x04,
480 INT_MAP_0_INT1_SLO_NO_MOT = 0x08,
481 INT_MAP_0_INT1_D_TAP = 0x10,
482 INT_MAP_0_INT1_S_TAP = 0x20,
483 INT_MAP_0_INT1_ORIENT = 0x40,
484 INT_MAP_0_INT1_FLAT = 0x80
491 _INT_MAP_1_INT1_RESERVED_BITS = 0x08 | 0x10,
493 INT_MAP_1_INT1_DATA = 0x01,
494 INT_MAP_1_INT1_FWM = 0x02,
495 INT_MAP_1_INT1_FFULL = 0x04,
499 INT_MAP_1_INT2_FFULL = 0x20,
500 INT_MAP_1_INT2_FWM = 0x40,
501 INT_MAP_1_INT2_DATA = 0x80
508 INT_MAP_2_INT2_LOW = 0x01,
509 INT_MAP_2_INT2_HIGH = 0x02,
510 INT_MAP_2_INT2_SLOPE = 0x04,
511 INT_MAP_2_INT2_SLO_NO_MOT = 0x08,
512 INT_MAP_2_INT2_D_TAP = 0x10,
513 INT_MAP_2_INT2_S_TAP = 0x20,
514 INT_MAP_2_INT2_ORIENT = 0x40,
515 INT_MAP_2_INT2_FLAT = 0x80
522 _INT_SRC_RESERVED_BITS = 0x40 | 0x80,
526 INT_SRC_SLO_NO_MOT = 0x04,
527 INT_SRC_SLOPE = 0x08,
538 _INT_OUT_CTRL_INT1_RESERVED_BITS = 0xf0,
540 INT_OUT_CTRL_INT1_LVL = 0x01,
541 INT_OUT_CTRL_INT1_OD = 0x02,
542 INT_OUT_CTRL_INT2_LVL = 0x04,
543 INT_OUT_CTRL_INT2_OD = 0x08
552 _INT_RST_LATCH_RESERVED_BITS = 0x10 | 0x20 | 0x40,
554 INT_RST_LATCH0 = 0x01,
555 INT_RST_LATCH1 = 0x02,
556 INT_RST_LATCH2 = 0x04,
557 INT_RST_LATCH3 = 0x08,
558 _INT_RST_LATCH_MASK = 15,
559 _INT_RST_LATCH_SHIFT = 0,
563 INT_RST_LATCH_RESET_INT = 0x80
570 RST_LATCH_NON_LATCHED = 0,
571 RST_LATCH_TEMPORARY_250MS = 1,
572 RST_LATCH_TEMPORARY_500MS = 2,
573 RST_LATCH_TEMPORARY_1S = 3,
574 RST_LATCH_TEMPORARY_2S = 4,
575 RST_LATCH_TEMPORARY_4S = 5,
576 RST_LATCH_TEMPORARY_8S = 6,
577 RST_LATCH_LATCHED = 7,
581 RST_LATCH_TEMPORARY_250US = 9,
582 RST_LATCH_TEMPORARY_500US = 10,
583 RST_LATCH_TEMPORARY_1MS = 11,
584 RST_LATCH_TEMPORARY_12_5MS = 12,
585 RST_LATCH_TEMPORARY_25MS = 13,
586 RST_LATCH_TEMPORARY_50MS = 14
595 INT_2_LOW_HY0 = 0x01,
596 INT_2_LOW_HY1 = 0x02,
597 _INT_2_LOW_HY_MASK = 3,
598 _INT_2_LOW_HY_SHIFT = 0,
600 INT_2_LOW_MODE = 0x04,
604 INT_2_HIGH_HY0 = 0x40,
605 INT_2_HIGH_HY1 = 0x80,
606 _INT_2_HIGH_HY_MASK = 3,
607 _INT_2_HIGH_HY_SHIFT = 6
614 INT_5_SLOPE_DUR0 = 0x01,
615 INT_5_SLOPE_DUR1 = 0x02,
616 _INT_5_SLOPE_DUR_MASK = 3,
617 _INT_5_SLOPE_DUR_SHIFT = 0,
619 INT_5_SLO_NO_MOT_DUR0 = 0x04,
620 INT_5_SLO_NO_MOT_DUR1 = 0x08,
621 INT_5_SLO_NO_MOT_DUR2 = 0x10,
622 INT_5_SLO_NO_MOT_DUR3 = 0x20,
623 INT_5_SLO_NO_MOT_DUR4 = 0x40,
624 INT_5_SLO_NO_MOT_DUR5 = 0x80,
625 _INT_5_SLO_NO_MOT_DUR_MASK = 63,
626 _INT_5_SLO_NO_MOT_DUR_SHIFT = 2
633 INT_8_TAP_DUR0 = 0x01,
634 INT_8_TAP_DUR1 = 0x02,
635 INT_8_TAP_DUR2 = 0x04,
636 _INT_8_TAP_DUR_MASK = 7,
637 _INT_8_TAP_DUR_SHIFT = 0,
641 INT_8_TAP_SHOCK = 0x40,
642 INT_8_TAP_QUIET = 0x80
649 INT_9_TAP_TH0 = 0x01,
650 INT_9_TAP_TH1 = 0x02,
651 INT_9_TAP_TH2 = 0x04,
652 INT_9_TAP_TH3 = 0x08,
653 INT_9_TAP_TH4 = 0x10,
654 _INT_5_TAP_TH_MASK = 31,
655 _INT_5_TAP_TH_SHIFT = 0,
659 INT_9_TAP_SAMP0 = 0x40,
660 INT_9_TAP_SAMP1 = 0x80,
661 INT_9_TAP_SAMP1_MASK = 3,
662 INT_9_TAP_SAMP1_SHIFT = 6
669 INT_A_ORIENT_MODE0 = 0x01,
670 INT_A_ORIENT_MODE1 = 0x02,
671 _INT_A_ORIENT_MODE_MASK = 3,
672 _INT_A_ORIENT_MODE_SHIFT = 0,
674 INT_A_ORIENT_BLOCKING0 = 0x04,
675 INT_A_ORIENT_BLOCKING1 = 0x08,
676 _INT_A_ORIENT_BLOCKING_MASK = 3,
677 _INT_A_ORIENT_BLOCKING_SHIFT = 2,
679 INT_A_ORIENT_HYST0 = 0x10,
680 INT_A_ORIENT_HYST1 = 0x20,
681 INT_A_ORIENT_HYST2 = 0x40,
682 _INT_A_ORIENT_HYST_MASK = 7,
683 _INT_A_ORIENT_HYST_SHIFT = 4
692 ORIENT_MODE_SYMETRICAL = 0,
693 ORIENT_MODE_HIGH_ASYMETRICAL = 1,
694 ORIENT_MODE_LOW_ASYMETRICAL = 2
701 ORIENT_BLOCKING_NONE = 0,
702 ORIENT_BLOCKING_THETA_ACC_1_5G = 1,
703 ORIENT_BLOCKING_THETA_ACC_0_2G_1_5G = 2,
704 ORIENT_BLOCKING_THETA_ACC_0_4G_1_5G = 3
711 INT_B_ORIENT_THETA0 = 0x01,
712 INT_B_ORIENT_THETA1 = 0x02,
713 INT_B_ORIENT_THETA2 = 0x04,
714 INT_B_ORIENT_THETA3 = 0x08,
715 INT_B_ORIENT_THETA4 = 0x10,
716 INT_B_ORIENT_THETA5 = 0x20,
717 _INT_B_ORIENT_THETA_MASK = 63,
718 _INT_B_ORIENT_THETA_SHIFT = 0,
720 INT_B_ORIENT_UD_EN = 0x40
728 INT_B_FLAT_THETA0 = 0x01,
729 INT_B_FLAT_THETA1 = 0x02,
730 INT_B_FLAT_THETA2 = 0x04,
731 INT_B_FLAT_THETA3 = 0x08,
732 INT_B_FLAT_THETA4 = 0x10,
733 INT_B_FLAT_THETA5 = 0x20,
734 _INT_B_FLAT_THETA_MASK = 63,
735 _INT_B_FLAT_THETA_SHIFT = 0,
744 INT_D_FLAT_HY0 = 0x01,
745 INT_D_FLAT_HY1 = 0x02,
746 INT_D_FLAT_HY2 = 0x04,
747 _INT_B_FLAT_HY_MASK = 7,
748 _INT_B_FLAT_HY_SHIFT = 0,
752 INT_D_FLAT_HOLD_TIME0 = 0x10,
753 INT_D_FLAT_HOLD_TIME1 = 0x20,
754 _INT_B_FLAT_HOLD_TIME_MASK = 3,
755 _INT_B_FLAT_HOLD_TIME_SHIFT = 4
764 _FIFO_CONFIG_0_RESERVED_BITS = 0x80 | 0x40,
766 FIFO_CONFIG_0_WATER_MARK0 = 0x01,
767 FIFO_CONFIG_0_WATER_MARK1 = 0x02,
768 FIFO_CONFIG_0_WATER_MARK2 = 0x04,
769 FIFO_CONFIG_0_WATER_MARK3 = 0x08,
770 FIFO_CONFIG_0_WATER_MARK4 = 0x10,
771 FIFO_CONFIG_0_WATER_MARK5 = 0x20,
772 _FIFO_CONFIG_0_WATER_MARK_MASK = 63,
773 _FIFO_CONFIG_0_WATER_MARK_SHIFT = 0
780 PMU_SELFTTEST_AXIS0 = 0x01,
781 PMU_SELFTTEST_AXIS1 = 0x02,
782 _PMU_SELFTTEST_AXIS_MASK = 3,
783 _PMU_SELFTTEST_AXIS_SHIFT = 0,
785 PMU_SELFTTEST_SIGN = 0x04,
789 PMU_SELFTTEST_AMP = 0x10,
798 SELFTTEST_AXIS_NONE = 0,
799 SELFTTEST_AXIS_X = 1,
800 SELFTTEST_AXIS_Y = 2,
801 SELFTTEST_AXIS_Z = 3,
808 TRIM_NVM_CTRL_NVM_PROG_MODE = 0x01,
809 TRIM_NVM_CTRL_NVM_PROG_TRIG = 0x02,
810 TRIM_NVM_CTRL_NVM_PROG_RDY = 0x04,
811 TRIM_NVM_CTRL_NVM_PROG_LOAD = 0x08,
813 TRIM_NVM_CTRL_NVM_REMAIN0 = 0x10,
814 TRIM_NVM_CTRL_NVM_REMAIN1 = 0x20,
815 TRIM_NVM_CTRL_NVM_REMAIN2 = 0x40,
816 TRIM_NVM_CTRL_NVM_REMAIN3 = 0x80,
817 _TRIM_NVM_CTRL_NVM_REMAIN_MASK = 15,
818 _TRIM_NVM_CTRL_NVM_REMAIN_SHIFT = 4
825 _SPI3_WDT_RESERVED_BITS = 0xf0 | 0x08,
827 SPI3_WDT_SPI3 = 0x01,
829 SPI3_WDT_I2C_WDT_SEL = 0x02,
830 SPI3_WDT_I2C_WDT_EN = 0x04
839 OFC_CTRL_HP_X_EN = 0x01,
840 OFC_CTRL_HP_Y_EN = 0x02,
841 OFC_CTRL_HP_Z_EN = 0x04,
845 OFC_CTRL_CAL_RDY = 0x10,
847 OFC_CTRL_CAL_TRIGGER0 = 0x20,
848 OFC_CTRL_CAL_TRIGGER1 = 0x40,
849 _OFC_CTRL_CAL_TRIGGER_MASK = 3,
850 _OFC_CTRL_CAL_TRIGGER_SHIFT = 5,
852 OFC_CTRL_OFFSET_RESET = 0x80
860 CAL_TRIGGER_NONE = 0,
870 OFC_SETTING_CUT_OFF = 0x01,
872 OFC_SETTING_OFFSET_TARGET_X0 = 0x02,
873 OFC_SETTING_OFFSET_TARGET_X1 = 0x04,
874 _OFC_SETTING_OFFSET_TARGET_X_MASK = 3,
875 _OFC_SETTING_OFFSET_TARGET_X_SHIFT = 1,
877 OFC_SETTING_OFFSET_TARGET_Y0 = 0x08,
878 OFC_SETTING_OFFSET_TARGET_Y1 = 0x10,
879 _OFC_SETTING_OFFSET_TARGET_Y_MASK = 3,
880 _OFC_SETTING_OFFSET_TARGET_Y_SHIFT = 3,
882 OFC_SETTING_OFFSET_TARGET_Z0 = 0x20,
883 OFC_SETTING_OFFSET_TARGET_Z1 = 0x40,
884 _OFC_SETTING_OFFSET_TARGET_Z_MASK = 3,
885 _OFC_SETTING_OFFSET_TARGET_Z_SHIFT = 5
894 OFFSET_TARGET_0G = 0,
895 OFFSET_TARGET_PLUS_1G = 1,
896 OFFSET_TARGET_MINUS_1G = 2,
904 FIFO_CONFIG_1_FIFO_DATA_SEL0 = 0x01,
905 FIFO_CONFIG_1_FIFO_DATA_SEL1 = 0x02,
906 _FIFO_CONFIG_1_FIFO_DATA_SEL = 3,
907 _FIFO_CONFIG_1_FIFO_DATA_SHIFT = 0,
911 FIFO_CONFIG_1_FIFO_MODE0 = 0x40,
912 FIFO_CONFIG_1_FIFO_MODE1 = 0x80,
913 _FIFO_CONFIG_1_FIFO_MODE_MASK = 3,
914 _FIFO_CONFIG_1_FIFO_MODE_SHIFT = 5
921 FIFO_DATA_SEL_XYZ = 0,
931 FIFO_MODE_BYPASS = 0,
968 BMA250E(
int bus=BMA250E_I2C_BUS,
int addr=BMA250E_DEFAULT_ADDR,
1365 #if defined(SWIGJAVA) || defined(JAVACALLBACK)
1366 void installISR(INTERRUPT_PINS_T intr,
int gpio, mraa::Edge level,
1381 void installISR(INTERRUPT_PINS_T intr,
int gpio, mraa::Edge level,
1382 void (*isr)(
void *),
void *arg);
1408 int readRegs(uint8_t reg, uint8_t *buffer,
int len);
1416 void writeReg(uint8_t reg, uint8_t val);
1422 mraa::Gpio *m_gpioIntr1;
1423 mraa::Gpio *m_gpioIntr2;
1426 mraa::Gpio *m_gpioCS;
1429 RESOLUTION_T m_resolution;
1432 bool m_fifoAvailable;
1445 float m_temperature;
1454 mraa::Gpio*& getPin(INTERRUPT_PINS_T intr);
1457 #if defined(SWIGJAVA) || defined(JAVACALLBACK)
1458 void installISR(INTERRUPT_PINS_T intr,
int gpio, mraa::Edge level,
1459 void (*isr)(
void *),
void *arg);
INT_STATUS_2_BITS_T
Definition: bma250e.hpp:240
ORIENT_MODE_T
Definition: bma250e.hpp:691
INT_MAP_0_BITS_T
Definition: bma250e.hpp:476
void fifoSetWatermark(int wm)
Definition: bma250e.cxx:458
int readRegs(uint8_t reg, uint8_t *buffer, int len)
Definition: bma250e.cxx:279
uint8_t getInterruptEnable0()
Definition: bma250e.cxx:495
INT_5_BITS_T
Definition: bma250e.hpp:613
RST_LATCH_T
Definition: bma250e.hpp:569
void setInterruptSrc(uint8_t bits)
Definition: bma250e.cxx:568
INT_9_BITS_T
Definition: bma250e.hpp:648
INT_EN_1_BITS_T
Definition: bma250e.hpp:445
CAL_TRIGGER_T
Definition: bma250e.hpp:859
void init(POWER_MODE_T pwr=POWER_MODE_NORMAL, RANGE_T range=RANGE_2G, BW_T bw=BW_250)
Definition: bma250e.cxx:144
void setInterruptMap1(uint8_t bits)
Definition: bma250e.cxx:546
ORIENT_T
Definition: bma250e.hpp:272
INT_STATUS_0_BITS_T
Definition: bma250e.hpp:215
uint8_t getInterruptEnable2()
Definition: bma250e.cxx:519
void setBandwidth(BW_T bw)
Definition: bma250e.cxx:442
void enableRegisterShadowing(bool shadow)
Definition: bma250e.cxx:615
void writeReg(uint8_t reg, uint8_t val)
Definition: bma250e.cxx:313
uint8_t readReg(uint8_t reg)
Definition: bma250e.cxx:257
void setInterruptEnable0(uint8_t bits)
Definition: bma250e.cxx:500
uint8_t getInterruptSrc()
Definition: bma250e.cxx:563
BW_T
Definition: bma250e.hpp:338
void setRange(RANGE_T range)
Definition: bma250e.cxx:390
PMU_BW_BITS_T
Definition: bma250e.hpp:323
INT_D_BITS_T
Definition: bma250e.hpp:743
void setInterruptOutputControl(uint8_t bits)
Definition: bma250e.cxx:580
float getTemperature(bool fahrenheit=false)
Definition: bma250e.cxx:376
void setLowPowerMode2()
Definition: bma250e.cxx:672
uint8_t getInterruptMap2()
Definition: bma250e.cxx:553
void setInterruptMap0(uint8_t bits)
Definition: bma250e.cxx:536
ACCD12_LSB_BITS_T
Definition: bma250e.hpp:199
uint8_t getInterruptStatus0()
Definition: bma250e.cxx:639
void reset()
Definition: bma250e.cxx:384
INT_OUT_CTRL_BITS_T
Definition: bma250e.hpp:537
SELFTTEST_AXIS_T
Definition: bma250e.hpp:797
RST_LATCH_T getInterruptLatchBehavior()
Definition: bma250e.cxx:596
POWER_MODE_T
Definition: bma250e.hpp:394
INT_2_BITS_T
Definition: bma250e.hpp:594
INT_C_BITS_T
Definition: bma250e.hpp:727
INT_8_BITS_T
Definition: bma250e.hpp:632
SLEEP_DUR_T
Definition: bma250e.hpp:377
INT_STATUS_1_BITS_T
Definition: bma250e.hpp:229
float * getAccelerometer()
Definition: bma250e.cxx:368
ACCD10_LSB_BITS_T
Definition: bma250e.hpp:184
PMU_RANGE_BITS_T
Definition: bma250e.hpp:299
void setInterruptEnable1(uint8_t bits)
Definition: bma250e.cxx:512
ACC_HBW_BITS_T
Definition: bma250e.hpp:416
uint8_t getInterruptStatus2()
Definition: bma250e.cxx:649
INT_STATUS_3_BITS_T
Definition: bma250e.hpp:254
INT_RST_LATCH_BITS_T
Definition: bma250e.hpp:551
~BMA250E()
Definition: bma250e.cxx:131
OFFSET_TARGET_T
Definition: bma250e.hpp:893
INT_MAP_1_BITS_T
Definition: bma250e.hpp:490
BMA250E_REGS_T
Definition: bma250e.hpp:85
FIFO_STATUS_BITS_T
Definition: bma250e.hpp:282
OFC_CTRL_BITS_T
Definition: bma250e.hpp:838
void clearInterruptLatches()
Definition: bma250e.cxx:587
void setInterruptEnable2(uint8_t bits)
Definition: bma250e.cxx:524
RANGE_T
Definition: bma250e.hpp:313
OFC_SETTING_BITS_T
Definition: bma250e.hpp:869
void setSelfTest(bool sign, bool amp, SELFTTEST_AXIS_T axis)
Definition: bma250e.cxx:482
uint8_t getInterruptStatus1()
Definition: bma250e.cxx:644
void fifoConfig(FIFO_MODE_T mode, FIFO_DATA_SEL_T axes)
Definition: bma250e.cxx:470
void update()
Definition: bma250e.cxx:173
void enableFIFO(bool useFIFO)
Definition: bma250e.cxx:251
PMU_SELFTTEST_BITS_T
Definition: bma250e.hpp:779
FIFO_MODE_T
Definition: bma250e.hpp:930
API for the BMA250E 10 bit Triaxial Accelerometer.
Definition: bma250e.hpp:72
void setInterruptLatchBehavior(RST_LATCH_T latch)
Definition: bma250e.cxx:605
ORIENT_T getInterruptStatus3Orientation()
Definition: bma250e.cxx:661
LOW_POWER_BITS_T
Definition: bma250e.hpp:404
PMU_LPW_BITS_T
Definition: bma250e.hpp:352
void setInterruptMap2(uint8_t bits)
Definition: bma250e.cxx:558
void setPowerMode(POWER_MODE_T power)
Definition: bma250e.cxx:447
TRIM_NVM_CTRL_BITS_T
Definition: bma250e.hpp:807
ORIENT_BLOCKING_T
Definition: bma250e.hpp:700
INT_MAP_2_BITS_T
Definition: bma250e.hpp:507
SPI3_WDT_BITS_T
Definition: bma250e.hpp:824
uint8_t getInterruptMap0()
Definition: bma250e.cxx:531
INT_B_BITS_T
Definition: bma250e.hpp:710
void installISR(INTERRUPT_PINS_T intr, int gpio, mraa::Edge level, void(*isr)(void *), void *arg)
Definition: bma250e.cxx:700
uint8_t getInterruptStatus3Bits()
Definition: bma250e.cxx:654
uint8_t getChipID()
Definition: bma250e.cxx:351
INT_EN_2_BITS_T
Definition: bma250e.hpp:462
FIFO_DATA_SEL_T
Definition: bma250e.hpp:920
BMA250E(int bus=BMA250E_I2C_BUS, int addr=BMA250E_DEFAULT_ADDR, int cs=-1)
Definition: bma250e.cxx:43
void enableOutputFiltering(bool filter)
Definition: bma250e.cxx:627
INT_SRC_BITS_T
Definition: bma250e.hpp:521
void uninstallISR(INTERRUPT_PINS_T intr)
Definition: bma250e.cxx:714
FIFO_CONFIG_0_BITS_T
Definition: bma250e.hpp:763
uint8_t getInterruptMap1()
Definition: bma250e.cxx:541
FIFO_CONFIG_1_BITS_T
Definition: bma250e.hpp:903
INT_A_BITS_T
Definition: bma250e.hpp:668
uint8_t getInterruptEnable1()
Definition: bma250e.cxx:507
INT_EN_0_BITS_T
Definition: bma250e.hpp:427
uint8_t getInterruptOutputControl()
Definition: bma250e.cxx:575