30 #include <mraa/i2c.hpp> 35 #define MMA8X5X_DEVICE_ID_MMA8652 0x4a 36 #define MMA8X5X_DEVICE_ID_MMA8653 0x5a 37 #define MMA8X5X_DEVICE_ID_MMA8451 0x1a 38 #define MMA8X5X_DEVICE_ID_MMA8452 0x2a 39 #define MMA8X5X_DEVICE_ID_MMA8453 0x3a 41 #define MMA8X5X_NAME_MMA8652 "MMA8652" 42 #define MMA8X5X_NAME_MMA8653 "MMA8653" 43 #define MMA8X5X_NAME_MMA8451 "MMA8451" 44 #define MMA8X5X_NAME_MMA8452 "MMA8452" 45 #define MMA8X5X_NAME_MMA8453 "MMA8453" 48 #define MMA8X5X_I2C_ADDRESS 0x1D 49 #define MMA8X5X_DEVICE_ID_REG 0x0D 52 #define MMA8X5X_STATUS 0x00 53 #define MMA8X5X_OUT_X_MSB 0x01 54 #define MMA8X5X_OUT_X_LSB 0x02 55 #define MMA8X5X_OUT_Y_MSB 0x03 56 #define MMA8X5X_OUT_Y_LSB 0x04 57 #define MMA8X5X_OUT_Z_MSB 0x05 58 #define MMA8X5X_OUT_Z_LSB 0x06 59 #define MMA8X5X_F_SETUP 0x09 60 #define MMA8X5X_TRIG_CFG 0x0A 61 #define MMA8X5X_SYSMOD 0x0B 62 #define MMA8X5X_INT_SOURCE 0x0C 63 #define MMA8X5X_XYZ_DATA_CFG 0x0E 64 #define MMA8X5X_HP_FILTER_CUTOFF 0x0F 65 #define MMA8X5X_PL_STATUS 0x10 67 #define MMA8X5X_PL_CFG 0x11 68 #define MMA8X5X_PL_COUNT 0x12 69 #define MMA8X5X_PL_BF_ZCOMP 0x13 70 #define MMA8X5X_P_L_THS_REG 0x14 72 #define MMA8X5X_FF_MT_CFG 0x15 74 #define MMA8X5X_FF_MT_SRC 0x16 76 #define MMA8X5X_FF_MT_THS 0x17 77 #define MMA8X5X_FF_MT_COUNT 0x18 78 #define MMA8X5X_TRANSIENT_CFG 0x1D 80 #define MMA8X5X_TRANSIENT_SRC 0x1E 81 #define MMA8X5X_TRANSIENT_THS 0x1F 82 #define MMA8X5X_TRANSIENT_COUNT 0x20 83 #define MMA8X5X_PULSE_CFG 0x21 84 #define MMA8X5X_PULSE_SRC 0x22 85 #define MMA8X5X_PULSE_THSX 0x23 86 #define MMA8X5X_PULSE_THSY 0x24 87 #define MMA8X5X_PULSE_THSZ 0x25 88 #define MMA8X5X_PULSE_TMLT 0x26 89 #define MMA8X5X_PULSE_LTCY 0x27 90 #define MMA8X5X_PULSE_WIND 0x28 91 #define MMA8X5X_ASLP_COUNT 0x29 92 #define MMA8X5X_CTRL_REG1 0x2A 93 #define MMA8X5X_CTRL_REG2 0x2B 94 #define MMA8X5X_CTRL_REG3 0x2C 95 #define MMA8X5X_CTRL_REG4 0x2D 96 #define MMA8X5X_CTRL_REG5 0x2E 97 #define MMA8X5X_OFF_X 0x2F 98 #define MMA8X5X_OFF_Y 0x30 99 #define MMA8X5X_OFF_Z 0x31 102 #define MMA8X5X_RATE_800HZ (0 << 3) 103 #define MMA8X5X_RATE_400HZ (1 << 3) 104 #define MMA8X5X_RATE_200HZ (2 << 3) 105 #define MMA8X5X_RATE_100HZ (3 << 3) 106 #define MMA8X5X_RATE_50HZ (4 << 3) 107 #define MMA8X5X_RATE_1HZ25 (5 << 3) 108 #define MMA8X5X_RATE_6HZ25 (6 << 3) 109 #define MMA8X5X_RATE_1HZ56 (7 << 3) 111 #define MMA8X5X_RATE_DEFAULT MMA8X5X_RATE_200HZ 114 #define MMA8X5X_RANGE_2G 0 115 #define MMA8X5X_RANGE_4G 1 116 #define MMA8X5X_RANGE_8G 2 118 #define MMA8X5X_RANGE_DEFAULT MMA8X5X_RANGE_2G 122 #define MMA8X5X_DATA_READY 1 123 #define MMA8X5X_NOI2C -1 124 #define MMA8X5X_NODEV -2 125 #define MMA8X5X_NODATA -3 128 #define MMA8X5X_STATUS_XDR (1 << 0) 129 #define MMA8X5X_STATUS_YDR (1 << 1) 130 #define MMA8X5X_STATUS_ZDR (1 << 2) 131 #define MMA8X5X_STATUS_ZYXDR (1 << 3) 132 #define MMA8X5X_STATUS_XOW (1 << 4) 133 #define MMA8X5X_STATUS_YOW (1 << 5) 134 #define MMA8X5X_STATUS_ZOW (1 << 6) 135 #define MMA8X5X_STATUS_ZYXOW (1 << 7) 137 #define MMA8X5X_F_STATUS_F_CNT_MASK 0x3F 138 #define MMA8X5X_F_STATUS_F_WMRK_FLAG (1 << 6) 139 #define MMA8X5X_F_STATUS_F_OVF (1 << 7) 141 #define MMA8X5X_F_SETUP_MODE_MASK 0xC0 142 #define MMA8X5X_F_SETUP_MODE_DISABLED 0 143 #define MMA8X5X_F_SETUP_MODE_CIRCULAR 1 144 #define MMA8X5X_F_SETUP_MODE_STOP 2 145 #define MMA8X5X_F_SETUP_MODE_TRIGGER 3 146 #define MMA8X5X_F_SETUP_F_WMRK_MASK 0x3F 148 #define MMA8X5X_TRIG_CFG_FF_MT (1 << 2) 149 #define MMA8X5X_TRIG_CFG_PULSE (1 << 3) 150 #define MMA8X5X_TRIG_CFG_LNDPRT (1 << 4) 151 #define MMA8X5X_TRIG_CFG_TRANS (1 << 5) 153 #define MMA8X5X_SYSMOD_MASK 0x3 154 #define MMA8X5X_SYSMOD_STANDBY 0 155 #define MMA8X5X_SYSMOD_WAKE 1 156 #define MMA8X5X_SYSMOD_SLEEP 2 157 #define MMA8X5X_SYSMOD_FGT_MASK 0x7C 158 #define MMA8X5X_SYSMOD_FGERR (1 << 7) 160 #define MMA8X5X_INT_SOURCE_DRDY (1 << 0) 161 #define MMA8X5X_INT_SOURCE_FF_MT (1 << 2) 162 #define MMA8X5X_INT_SOURCE_PULSE (1 << 3) 163 #define MMA8X5X_INT_SOURCE_LNDPRT (1 << 4) 164 #define MMA8X5X_INT_SOURCE_TRANS (1 << 5) 165 #define MMA8X5X_INT_SOURCE_FIFO (1 << 6) 166 #define MMA8X5X_INT_SOURCE_ASLP (1 << 7) 168 #define MMA8X5X_XYZ_DATA_CFG_FS_MASK 0x3 169 #define MMA8X5X_XYZ_DATA_CFG_HPF_OUT (1 << 4) 171 #define MMA8X5X_HP_FILTER_SEL_MASK 0x03 172 #define MMA8X5X_HP_FILTER_LPF_EN (1 << 4) 173 #define MMA8X5X_HP_FILTER_HPF_BYP (1 << 5) 175 #define MMA8X5X_PL_STATUS_BAFRO (1 << 0) 176 #define MMA8X5X_PL_STATUS_LAPO_MASK 0x6 177 #define MMA8X5X_PL_STATUS_LAPO_P_UP 0 178 #define MMA8X5X_PL_STATUS_LAPO_P_DOWN 1 179 #define MMA8X5X_PL_STATUS_LAPO_L_RIGHT 2 180 #define MMA8X5X_PL_STATUS_LAPO_L_LEFT 3 181 #define MMA8X5X_PL_STATUS_LO (1 << 6) 182 #define MMA8X5X_PL_STATUS_NEWLP (1 << 7) 184 #define MMA8X5X_PL_CFG_PL_EN (1 << 6) 185 #define MMA8X5X_PL_CFG_DBCNTM (1 << 7) 187 #define MMA8X5X_PL_BF_ZCOMP_ZLOCK_MASK 0x07 188 #define MMA8X5X_PL_BF_ZCOMP_BKFR_MASK 0xC0 190 #define MMA8X5X_P_L_HYS_MASK 0x07 191 #define MMA8X5X_P_L_THS_MASK 0xF8 193 #define MMA8X5X_FF_MT_CFG_XEFE (1 << 3) 194 #define MMA8X5X_FF_MT_CFG_YEFE (1 << 4) 195 #define MMA8X5X_FF_MT_CFG_ZEFE (1 << 5) 196 #define MMA8X5X_FF_MT_CFG_OAE (1 << 6) 197 #define MMA8X5X_FF_MT_CFG_ELE (1 << 7) 199 #define MMA8X5X_FF_MT_SRC_XHP (1 << 0) 200 #define MMA8X5X_FF_MT_SRC_XHE (1 << 1) 201 #define MMA8X5X_FF_MT_SRC_YHP (1 << 2) 202 #define MMA8X5X_FF_MT_SRC_YHE (1 << 3) 203 #define MMA8X5X_FF_MT_SRC_ZHP (1 << 4) 204 #define MMA8X5X_FF_MT_SRC_ZHE (1 << 5) 205 #define MMA8X5X_FF_MT_SRC_EA (1 << 7) 207 #define MMA8X5X_FF_MT_THS_MASK 0x7F 208 #define MMA8X5X_FF_MT_THS_DBCNTM (1 << 7) 210 #define MMA8X5X_TRANSIENT_CFG_HPF_BYP (1 << 0) 211 #define MMA8X5X_TRANSIENT_CFG_XTEFE (1 << 1) 212 #define MMA8X5X_TRANSIENT_CFG_YTEFE (1 << 2) 213 #define MMA8X5X_TRANSIENT_CFG_ZTEFE (1 << 3) 214 #define MMA8X5X_TRANSIENT_CFG_ELE (1 << 4) 216 #define MMA8X5X_TRANSIENT_SRC_XTPOL (1 << 0) 217 #define MMA8X5X_TRANSIENT_SRC_XTEVENT (1 << 1) 218 #define MMA8X5X_TRANSIENT_SRC_YTPOL (1 << 2) 219 #define MMA8X5X_TRANSIENT_SRC_YTEVENT (1 << 3) 220 #define MMA8X5X_TRANSIENT_SRC_ZTPOL (1 << 4) 221 #define MMA8X5X_TRANSIENT_SRC_ZTEVENT (1 << 5) 222 #define MMA8X5X_TRANSIENT_SRC_EA (1 << 6) 224 #define MMA8X5X_TRANSIENT_THS_MASK 0x7F 225 #define MMA8X5X_TRANSIENT_THS_DBCNTM (1<< 7) 227 #define MMA8X5X_PULSE_CFG_XSPEFE (1 << 0) 228 #define MMA8X5X_PULSE_CFG_XDPEFE (1 << 1) 229 #define MMA8X5X_PULSE_CFG_YSPEFE (1 << 2) 230 #define MMA8X5X_PULSE_CFG_YDPEFE (1 << 3) 231 #define MMA8X5X_PULSE_CFG_ZSPEFE (1 << 4) 232 #define MMA8X5X_PULSE_CFG_ZDPEFE (1 << 5) 233 #define MMA8X5X_PULSE_CFG_ELE (1 << 6) 234 #define MMA8X5X_PULSE_CFG_DPA (1 << 7) 236 #define MMA8X5X_PULSE_SRC_POLX (1 << 0) 237 #define MMA8X5X_PULSE_SRC_POLY (1 << 1) 238 #define MMA8X5X_PULSE_SRC_POLZ (1 << 2) 239 #define MMA8X5X_PULSE_SRC_DPE (1 << 3) 240 #define MMA8X5X_PULSE_SRC_AXX (1 << 4) 241 #define MMA8X5X_PULSE_SRC_AXY (1 << 5) 242 #define MMA8X5X_PULSE_SRC_AXZ (1 << 6) 243 #define MMA8X5X_PULSE_SRC_EA (1 << 7) 245 #define MMA8X5X_PULSE_THSX_MASK 0x7F 246 #define MMA8X5X_PULSE_THSY_MASK 0x7F 247 #define MMA8X5X_PULSE_THSZ_MASK 0x7F 249 #define MMA8X5X_CTRL_REG1_ACTIVE (1 << 0) 250 #define MMA8X5X_CTRL_REG1_F_READ (1 << 1) 251 #define MMA8X5X_CTRL_REG1_DR_MASK 0x38 252 #define MMA8X5X_CTRL_REG1_DR_SHIFT 3 253 #define MMA8X5X_CTRL_REG1_DR(x) (((uint8_t)(((uint8_t)(x))<<\ 254 MMA8X5X_CTRL_REG1_DR_SHIFT))\ 255 &MMA8X5X_CTRL_REG1_DR_MASK) 256 #define MMA8X5X_CTRL_REG1_ASR_MASK 0xC0 257 #define MMA8X5X_CTRL_REG1_ASR_50HZ 0 258 #define MMA8X5X_CTRL_REG1_ASR_12HZ5 1 259 #define MMA8X5X_CTRL_REG1_ASR_6HZ25 2 260 #define MMA8X5X_CTRL_REG1_ASR_1HZ56 3 262 #define MMA8X5X_CTRL_REG2_MODS_MASK 0x3 263 #define MMA8X5X_CTRL_REG2_MODS_NORMAL 0 264 #define MMA8X5X_CTRL_REG2_MODS_LNLP 1 265 #define MMA8X5X_CTRL_REG2_MODS_HR 2 266 #define MMA8X5X_CTRL_REG2_MODS_LP 3 267 #define MMA8X5X_CTRL_REG2_SLPE (1 << 2) 268 #define MMA8X5X_CTRL_REG2_SMODS_MASK 0x18 269 #define MMA8X5X_CTRL_REG2_SMODS_NORMAL 0 270 #define MMA8X5X_CTRL_REG2_SMODS_LNLP 1 271 #define MMA8X5X_CTRL_REG2_SMODS_HR 2 272 #define MMA8X5X_CTRL_REG2_SMODS_LP 3 273 #define MMA8X5X_CTRL_REG2_RST (1 << 6) 274 #define MMA8X5X_CTRL_REG2_ST (1 << 7) 276 #define MMA8X5X_CTRL_REG3_PP_OD (1 << 0) 277 #define MMA8X5X_CTRL_REG3_IPOL (1 << 1) 278 #define MMA8X5X_CTRL_REG3_WAKE_FF_MT (1 << 3) 279 #define MMA8X5X_CTRL_REG3_WAKE_PULSE (1 << 4) 280 #define MMA8X5X_CTRL_REG3_WAKE_LNDPRT (1 << 5) 281 #define MMA8X5X_CTRL_REG3_WAKE_TRANS (1 << 6) 282 #define MMA8X5X_CTRL_REG3_FIFO_GATE (1 << 7) 284 #define MMA8X5X_CTRL_REG4_INT_EN_DRDY (1 << 0) 285 #define MMA8X5X_CTRL_REG4_INT_EN_FF_MT (1 << 2) 286 #define MMA8X5X_CTRL_REG4_INT_EN_PULSE (1 << 3) 287 #define MMA8X5X_CTRL_REG4_INT_EN_LNDPRT (1 << 4) 288 #define MMA8X5X_CTRL_REG4_INT_EN_TRANS (1 << 5) 289 #define MMA8X5X_CTRL_REG4_INT_EN_FIFO (1 << 6) 290 #define MMA8X5X_CTRL_REG4_INT_EN_ASLP (1 << 7) 292 #define MMA8X5X_CTRL_REG5_INT_CFG_DRDY (1 << 0) 293 #define MMA8X5X_CTRL_REG5_INT_CFG_FF_MT (1 << 2) 294 #define MMA8X5X_CTRL_REG5_INT_CFG_PULSE (1 << 3) 295 #define MMA8X5X_CTRL_REG5_INT_CFG_LNDPRT (1 << 4) 296 #define MMA8X5X_CTRL_REG5_INT_CFG_TRANS (1 << 5) 297 #define MMA8X5X_CTRL_REG5_INT_CFG_FIFO (1 << 6) 298 #define MMA8X5X_CTRL_REG5_INT_CFG_ASLP (1 << 7) 355 int devAddr=MMA8X5X_I2C_ADDRESS);
431 int16_t
getX(
int bSampleData = 0);
440 int16_t
getY(
int bSampleData = 0);
449 int16_t
getZ(
int bSampleData = 0);
467 mraa::I2c m_i2ControlCtx;
int setDeviceName(uint8_t type)
Definition: mma8x5x.cpp:109
int sampleData(void)
Definition: mma8x5x.cpp:274
int16_t getX(int bSampleData=0)
Definition: mma8x5x.cpp:293
MMA8X5X(int bus, mma8x5x_params_t *params=NULL, int devAddr=MMA8X5X_I2C_ADDRESS)
Definition: mma8x5x.cpp:40
int isReady(void)
Definition: mma8x5x.cpp:260
int setActive(void)
Definition: mma8x5x.cpp:226
int setUserOffset(int8_t x, int8_t y, int8_t z)
Definition: mma8x5x.cpp:201
Definition: mma8x5x.hpp:302
int16_t getZ(int bSampleData=0)
Definition: mma8x5x.cpp:319
Definition: mma8x5x.hpp:311
C++ API wrapper for the bh1749 driver.
Definition: a110x.hpp:29
int getData(mma8x5x_data_t *data, int bSampleData=0)
Definition: mma8x5x.cpp:332
int setStandby(void)
Definition: mma8x5x.cpp:243
int16_t getY(int bSampleData=0)
Definition: mma8x5x.cpp:306
API for the MMA8X5X Three-Axis Accelerometer.
Definition: mma8x5x.hpp:344
int setDeviceParams(mma8x5x_params_t *params)
Definition: mma8x5x.cpp:148