upm
0.2.0
Sensor/Actuator repository for libmraa (v0.6.1)
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SI1145 UV light sensor. More...
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Data Structures | |
class | SI114X |
C++ API for the SI1145 UV light sensor. More... | |
Enumerations | |
enum | SI114X_REG_T { REG_PART_ID = 0x00, REG_REV_ID = 0x01, REG_SEQ_ID = 0x02, REG_INT_CFG = 0x03, REG_IRQ_ENABLE = 0x04, REG_IRQ_MODE1 = 0x05, REG_IRQ_MODE2 = 0x06, REG_HW_KEY = 0x07, REG_MEAS_RATE0 = 0x08, REG_MEAS_RATE1 = 0x09, REG_PS_LED21 = 0x0f, REG_PS_LED3 = 0x10, REG_UCOEF0 = 0x13, REG_UCOEF1 = 0x14, REG_UCOEF2 = 0x15, REG_UCOEF3 = 0x16, REG_PARAM_WR = 0x17, REG_COMMAND = 0x18, REG_RESPONSE = 0x20, REG_IRQ_STATUS = 0x21, REG_ALS_VIS_DATA0 = 0x22, REG_ALS_VIS_DATA1 = 0x23, REG_ALS_IR_DATA0 = 0x24, REG_ALS_IR_DATA1 = 0x25, REG_PS1_DATA0 = 0x26, REG_PS1_DATA1 = 0x27, REG_PS2_DATA0 = 0x28, REG_PS2_DATA1 = 0x29, REG_PS3_DATA0 = 0x2a, REG_PS3_DATA1 = 0x2b, REG_AUX_UVINDEX0 = 0x2c, REG_AUX_UVINDEX1 = 0x2d, REG_PARAM_READ = 0x2e, REG_CHIP_STAT = 0x30, REG_ANA_IN_KEY0 = 0x3b, REG_ANA_IN_KEY1 = 0x3c, REG_ANA_IN_KEY2 = 0x3d, REG_ANA_IN_KEY3 = 0x3e } |
enum | SI114X_PARAM_T { PARAM_I2C_ADDDR = 0x00, PARAM_CHLIST = 0x01, PARAM_PSLED12_SEL = 0x02, PARAM_PSLED3_SEL = 0x03, PARAM_PS_ENCODING = 0x05, PARAM_ALS_ENCODING = 0x06, PARAM_PS1_ADCMUX = 0x07, PARAM_PS2_ADCMUX = 0x08, PARAM_PS3_ADCMUX = 0x09, PARAM_PS_ADC_COUNT = 0x0a, PARAM_PS_ADC_GAIN = 0x0b, PARAM_PS_ADC_MISC = 0x0c, PARAM_ALS_IR_ADCMUX = 0x0e, PARAM_AUX_ADCMUX = 0x0f, PARAM_ALS_VIS_ADC_COUNT = 0x10, PARAM_ALS_VIS_ADC_GAIN = 0x11, PARAM_ALS_VIS_ADC_MISC = 0x12, PARAM_LED_REC = 0x1c, PARAM_ALS_IR_ADC_COUNT = 0x1d, PARAM_ALS_IR_ADX_GAIN = 0x1e, PARAM_ALS_IR_ADC_MISC = 0x1f } |
enum | SI114X_CMD_T { CMD_NOOP = 0x00, CMD_RESET = 0x01, CMD_BUSADDR = 0x02, CMD_PS_FORCE = 0x05, CMD_GET_CAL = 0x12, CMD_ALS_FORCE = 0x06, CMD_PSALS_FORCE = 0x07, CMD_PS_PAUSE = 0x09, CMD_ALS_PAUSE = 0x0a, CMD_PSALS_PAUSE = 0x0b, CMD_PS_AUTO = 0x0d, CMD_ALS_AUTO = 0x0e, CMD_PSALS_AUTO = 0x0f, CMD_PARAM_QUERY = 0x80, CMD_PARAM_SET = 0xa0 } |
enum | SI114X_CHLIST_BITS_T { CHLIST_EN_PS1 = 0x01, CHLIST_EN_PS2 = 0x02, CHLIST_EN_PS3 = 0x04, CHLIST_EN_ALS_VIS = 0x10, CHLIST_EN_ALS_IR = 0x20, CHLIST_EN_AUX = 0x40, CHLIST_EN_UV = 0x80 } |
enum | SI114X_ERR_T { ERR_NONE = 0x00, ERR_INVALID_SET = 0x80, ERR_PS1_ADC_OVER = 0x88, ERR_PS2_ADC_OVER = 0x89, ERR_PS3_ADC_OVER = 0x8a, ERR_ALS_VIS_ADC_OVER = 0x8c, ERR_ALS_IR_ADC_OVER = 0x8d, ERR_AUX_ADC_OVER = 0x8e } |
enum | SI114X_IRQEN_BITS_T { IRQEN_ALS_IE = 0x01, IRQEN_PS1_IE = 0x04, IRQEN_PS2_IE = 0x08, IRQEN_PS3_IE = 0x10 } |
enum SI114X_REG_T |
SI114X registers
enum SI114X_PARAM_T |
Parameter memory (PARAM)
enum SI114X_CMD_T |
Commands (written to the REG_COMMAND register)
enum SI114X_CHLIST_BITS_T |
Channel List enable bits
enum SI114X_ERR_T |
Error codes from the RESPONSE register
enum SI114X_IRQEN_BITS_T |
Interrupt enable bits